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Transistor and preparation method thereof

A technology of transistor and thermal evaporation method, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc. It can solve the problems of poor density, low flatness, and inability to achieve benign growth of the modified layer.

Pending Publication Date: 2019-05-03
GUANGZHOU AURORA TECHNOLOGIES CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the OTS modification material is a silane group, which has weak binding force with the surface groups of the oxide insulating layer, which will lead to poor compactness and low flatness of the modification layer, and the organic semiconductor layer deposited on the modification layer cannot achieve Benign growth, which in turn affects the performance of the transistor

Method used

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  • Transistor and preparation method thereof
  • Transistor and preparation method thereof
  • Transistor and preparation method thereof

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preparation example Construction

[0038] The present invention also provides a method for preparing the transistor, comprising the following steps:

[0039] Depositing the material of the insulating layer on the surface of the silicon wafer by atomic layer deposition, and annealing to obtain a silicon wafer deposited with the insulating layer;

[0040] immersing the silicon wafer deposited with an insulating layer in a solution containing a phosphoric acid-based organic compound to form a modification layer on the surface of the insulating layer;

[0041] Depositing an organic semiconductor layer material on the surface of the modification layer by thermal evaporation, forming an organic semiconductor layer on the surface of the modification layer;

[0042] A metal source and drain electrode material is deposited on the surface of the organic semiconductor layer by thermal evaporation, and a metal source and drain electrode layer is formed on the surface of the organic semiconductor layer to obtain a transisto...

Embodiment 1

[0058] according to figure 1 Structure shown:

[0059] Place a p++ type silicon wafer substrate with a size of 15mm*15mm and a thickness of 500μm on a silicon wafer holder, and place it in sequence with acetone, isopropanol, absolute ethanol, hydrofluoric acid, concentrated sulfuric acid, and ultrapure In a beaker of water, after ultrasonication for 5 minutes, take out the washed silicon wafer and dry it to obtain the pretreated silicon wafer substrate;

[0060] Preheat the ALD equipment, and when the temperature of the reaction chamber of the ALD equipment rises to 250°C, put the pretreated silicon wafer substrate into the chamber to deposit Al2O3, after deposition, in the RTP equipment, at 300 The annealing treatment is carried out under the condition of ℃, and the annealing time is controlled to be 1h, and an aluminum oxide insulating layer with a thickness of 40nm is obtained on the surface of the silicon wafer;

[0061] Soak the silicon wafer deposited with the Al2O3 in...

Embodiment 2

[0067] Place a p++ type silicon wafer substrate with a size of 15mm*15mm and a thickness of 500μm on a silicon wafer holder, and place it in sequence with acetone, isopropanol, absolute ethanol, hydrofluoric acid, concentrated sulfuric acid, and ultrapure In a beaker of water, after ultrasonication for 5 minutes, take out the washed silicon wafer and dry it to obtain the pretreated silicon wafer substrate;

[0068] Preheat the ALD equipment. When the temperature of the reaction chamber of the ALD equipment rises to 250°C, put the pretreated silicon wafer substrate into the chamber to deposit zirconia. Conditions for annealing treatment, control the annealing time to 1h, and obtain a zirconia insulating layer with a thickness of 40nm on the surface of the silicon wafer;

[0069] Soak the silicon wafer deposited with a zirconia insulating layer in an anhydrous ethanol solution of PA-C12 with a concentration of 0.2mmol / L at a temperature of 70°C for 12 hours; After rinsing with ...

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Abstract

The invention relates to the technical field of semiconductor devices, in particular to a transistor and a preparation method thereof. The transistor provided by the invention sequentially comprises asilicon wafer, an insulating layer, a modification layer, an organic semiconductor layer and a metal source drain electrode layer from bottom to top. The material of the insulating layer is Al2O3, HfO2 or ZrO2; and the material of the modification layer is a phosphate group-containing organic matter. According to the records of the embodiment, the ion mobility of the transistor is larger than orequal to 0.34 cm<2> / (V.S), and the current switching ratio is larger than or equal to 3*10<-4>.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to a transistor and a preparation method thereof. Background technique [0002] At present, most of the driving circuits required in the display field are mainly thermally oxidized silicon dioxide, and then SiO is obtained through photolithography. 2 - TFT array. As the resolution of display devices becomes higher and higher, the power consumption of TFT devices is required to be smaller and smaller, and the unit capacitance of the gate insulating layer must be further increased. Therefore, the discovery of high dielectric materials greatly reduces the operating voltage required by the driving circuit and realizes a low power consumption driving circuit. However, the transistor, which is the most basic unit for implementing a circuit, needs a sufficiently large mobility, switching ratio, and on-state current to achieve the purpose of reducing the power consumption of...

Claims

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Application Information

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IPC IPC(8): H01L51/05H01L51/44H01L51/46H01L51/48
CPCY02E10/549Y02P70/50
Inventor 杨俊锋赖伟升丁明建钟建平庄彤陆旭兵
Owner GUANGZHOU AURORA TECHNOLOGIES CO LTD