Low-temperature-coefficient polycrystalline resistor module compatible with dual-gate-oxide high-low-voltage CMOS process, and integration method of module
A low temperature coefficient, polycrystalline resistance technology, applied in circuits, transistors, electrical components, etc., can solve the problems of difficult to achieve precise control of the process, difficult to accurately control the absolute value of the resistance value, etc., to achieve excellent long-term stability and improve production quality. efficiency, avoid pollution
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Embodiment 1
[0049] An integration method for a low temperature coefficient polycrystalline resistance module compatible with a double-gate oxide high-voltage and low-voltage CMOS process mainly includes the following steps:
[0050] 1) A well is formed on the surface of the substrate, and a field oxide layer of 5000 angstroms is formed on the surface of the well, and a gate oxide layer is formed on the area of the well surface not covered by the field oxide layer.
[0051]A shielding protective layer is formed on the surface of the area not covered by the field oxide layer. Before forming a gate oxide layer in the area not covered by the field oxide layer, the shielding protection layer is removed. On the surface of the field oxide layer, a 1800 angstrom polycrystalline resistance layer is formed by low-pressure chemical vapor deposition, and N-type phosphorus is injected into the polysilicon layer by general injection to generate high-value resistance. The square resistance value of t...
Embodiment 2
[0077] see Figure 10 to Figure 13 , an integration method for low temperature coefficient polycrystalline resistor modules compatible with dual gate oxide high and low voltage CMOS processes, mainly including the following steps:
[0078] 1) A well is formed on the surface of the substrate, and a field oxide layer of 5000 angstroms is formed on the surface of the well, and a shielding protection layer is formed on the area other than the field oxide layer.
[0079] 2) A 1800 angstrom polycrystalline resistance layer is formed on the surface of the field oxide layer by a low-pressure chemical vapor deposition method, thereby generating a high-value resistance. The high value resistors have a sheet resistance value of 3600ohm / sqr.
[0080] Before forming the polycrystalline resistance layer, the shielding protection layer and the field oxide layer are cleaned.
[0081] 3) Etching the polycrystalline resistance layer by using a dry etching process, so as to generate resistance...
Embodiment 3
[0094] The polycrystalline resistor module integrated by using the double gate oxide high and low voltage CMOS process compatible with the low temperature coefficient polycrystalline resistor module integration method mainly includes substrate, well, field oxide layer, polycrystalline resistor layer, dielectric layer, thick gate oxide layer , thin gate oxide and polysilicon gate.
[0095] The substrate is at the bottom. Wells are formed on the surface of the substrate.
[0096] A field oxide layer is formed on the surface of the well.
[0097] The field oxide layer includes a high voltage device region, a medium voltage device region and a low voltage device region.
[0098] There is a thick gate oxide in the high voltage device area and the medium voltage device area.
[0099] There is a thin gate oxide in the low voltage device area.
[0100] The polycrystalline resistance layer is formed on the surface of the field oxide layer.
[0101] The dielectric layer is formed o...
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