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Low-voltage trench gate super junction MOS device

A MOS device and trench gate technology, applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of high cost and complex process, simplify the manufacturing process, reduce the complexity of the process, and improve the breakdown voltage. Effect

Pending Publication Date: 2019-07-09
GUIZHOU E CHIP MICROELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is to propose a low-voltage trench-gate super-junction MOS device to overcome the shortcomings of the current mainstream super-junction manufacturing method, such as complex process and high cost.

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  • Low-voltage trench gate super junction MOS device
  • Low-voltage trench gate super junction MOS device
  • Low-voltage trench gate super junction MOS device

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Embodiment

[0018] like figure 1 Shown is a schematic structural diagram of a low-voltage trench-gate super-junction MOS device proposed by the present invention. It includes a metallized drain electrode 1, an N+ substrate 2, and an N- epitaxial layer 5 located above the N+ substrate 2. The buried layer 3 is formed by ion implantation and reverse expansion during epitaxy, and is formed by ion implantation after etching the deep groove. doped layer 4, thermally grown gate oxide layer 6, deposited heavily doped polysilicon 7, and both sides of the upper part of the N- epitaxial layer are P-type body regions 8, and the P-type body regions 8 are provided with mutually Independent N+ source region 9, deposited borophosphosilicate glass 10, metallized source electrode 11 on the upper surface.

[0019] The present invention has a manufacturing process compatible with traditional TrenchMOS devices, and the added process steps are relatively simple and reliable, but it has higher breakdown voltag...

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PUM

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Abstract

The invention provides a low-voltage trench gate super junction MOS device. A buried layer is formed through ion injection after first epitaxy and ion reverse expansion after second epitaxy and is connected with an ion injection doping layer after trench gate etching, so as to form a P column, then the P column and the epitaxy layer form a P / N column alternate super junction structure. Compared with traditional Trench MOS device, the low-voltage trench gate super junction MOS device has higher breakdown voltage and lower specific on resistance; the ion injection doping layer etched by deep trench can help mitigate the electric field for the trench gate oxide layer, thereby making the gate oxide layer more reliable. The simple super junction MOS structure manufacture process is compatible with traditional Trench MOS device process, and overcomes defects of complex manufacture process of the current super junction device and high cost by increasing two times of ion injection.

Description

technical field [0001] The invention belongs to the technical field of power semiconductor devices, and in particular relates to a low-voltage trench-gate superjunction MOS device. Background technique [0002] The super junction MOS device provides a lateral electric field by introducing P-type and N-type alternately arranged junction-type withstand voltage layers in its drift region, and obtains a new relationship between breakdown voltage and on-resistance Ron∝BV1.33, breaking the silicon-based The limit of MOS devices greatly increases the breakdown voltage of MOS devices and reduces the forward conduction loss. [0003] At present, there are two main manufacturing methods for super-junction MOS devices: one is to form a super-junction structure by multiple epitaxial implants, which is simple in process, but the process is cumbersome and the time cost is high; the other is to complete by deep groove etching and filling, This method is relatively simple, but needs to int...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/40H01L29/06H01L21/336
CPCH01L29/7827H01L29/0623H01L29/0634H01L29/402H01L29/66666
Inventor 李泽宏王为谢驰
Owner GUIZHOU E CHIP MICROELECTRONICS TECH CO LTD
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