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Method for fabricating a small-sized high-quality MRAM component

A component and seed layer technology, applied in the fields of magnetic field controlled resistors, electromagnetic device manufacturing/processing, etc., can solve the problems of MRAM cell size increase, rough MgO barrier layer performance, hindering the improvement of memory density, etc.

Active Publication Date: 2019-09-03
SHANGHAI CIYU INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the presence of conductive materials such as copper, the top surface of the VIA tends to be rough, which in turn leads to a rough MgO barrier layer (135) and poor magnetic tunneling
In order to avoid topographical defects due to VIA, the MTJ unit is usually not directly located on the VIA (such as figure 2 ), but the cost is to increase the size of the MRAM unit, hindering the improvement of memory density

Method used

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  • Method for fabricating a small-sized high-quality MRAM component
  • Method for fabricating a small-sized high-quality MRAM component
  • Method for fabricating a small-sized high-quality MRAM component

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0048] Example 1

[0049] After the above BE deposition process, the vacuum is maintained, followed by MTJ thin film deposition. The deposition sequence of the MTJ film is: seed layer, magnetic reference layer, tunnel barrier layer, magnetic memory layer, cover layer, and finally a hard mask layer.

[0050] For pSTT-MRAM, the magnetic reference layer contains superlattice materials such as [Co / X]n, where X can be Pt, Pd or Ni, and n ranges from 5 to 20. Uniaxial magnetic anisotropy, and has a large coercive force (unchanged), that is, this layer has magnetic polarization invariance. In order to further strengthen its magnetic polarization invariance, the material of the magnetic reference layer can be a composite layer material such as [Co / X]n / Co / Ru / Co / Ta / CoFeB, and the thickness of Ru is its second oscillation peak or the first oscillation peak

[0051] The tunnel barrier layer is a thin metal oxide material, such as MgO, ZnO or MgZnO, with a thickness of

[0052] Th...

Embodiment 2

[0059] We use the bottom electrode of the amorphous composite layer CoFeB / Ta / CoFeB in this application, and the bottom electrode of the amorphous simple layer CoFeB described in the application number 201510542242.8 "A method for preparing small-sized high-quality MRAM elements". Electrodes were fabricated and tested for comparison.

[0060] The structure of the lower electrode using the amorphous simple layer CoFeB described in the previous patent application is: Ta(5nm) / CuN(9nm) / CoFeB(2nm) / CuN(9nm) / CoFeB(2nm) / CuN(9nm) ), the structure of the low electrode using the amorphous composite layer CoFeB / Ta / CoFeB described in this patent application is: Ta(5nm) / CuN(9nm) / CoFeB(0.6nm) / Ta(0.8nm) / CoFeB(0.6nm) / CuN(9nm) / CoFeB(0.6nm) / Ta(0.8nm) / CoFeB(0.6nm) / CuN(9nm), where the thickness of each composite layer is consistent with that of the simple layer, above the lower electrode The MTJ structure is exactly the same. After the thin film is deposited, an annealing treatment is performed,...

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Abstract

The invention relates to a method for fabricating a small-sized MRAM component. The method builds, on a semiconductor wafer, an MTJ as close as possible to an associated through hole connected to an associated circuit. The invention provides a process scheme for planarizing the surface of a bottom electrode during film deposition in order to obtain atomic-scale smoothness rather than rough MTJ multilayer film deposition, wherein the MTJ multilayer film is as close as possible to the associated through hole. The planarization scheme first deposits a thin amorphous conductive multilayer film onthe center of the bottom electrode so as to prevent the continuous crystalline growth of a bottom electrode material, lower the barrier for surface atomic diffusion, and move the diffusion from a highpoint to a low kink. The planarization scheme not only can make the MRAM device very small, but also greatly improve the performance and magnetic stability of the device.

Description

technical field [0001] The invention relates to a method for preparing small-sized and high-quality magnetic random access memory (MRAM, Magnetic Random Access Memory) elements, so as to produce MRAM chips with high density and high rate of good and bad. Background technique [0002] In recent years, MRAM using the magnetoresistance effect of Magnetic Tunnel Junction (MTJ) is considered to be the future solid-state non-volatile memory, which has the characteristics of high-speed reading and writing, large capacity and low energy consumption. Ferromagnetic MTJ is usually a sandwich structure, which has a magnetic memory layer, which can change the magnetization direction to record different data; an insulating tunnel barrier layer in the middle; a magnetic reference layer, located on the other side of the tunnel barrier layer, which The direction of magnetization remains unchanged. When the direction of the magnetization vector between the magnetic memory layer and the magne...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L43/12H01L43/08H10N50/01H10N50/10
CPCH10N50/10H10N50/01
Inventor 郭一民肖荣福陈峻麻榆阳
Owner SHANGHAI CIYU INFORMATION TECH CO LTD