Double-top-layer metal CMOS process of device under bonding pad
A top metal and pad technology, applied in the field of double top metal CMOS process, can solve problems such as inability to realize DUP, and achieve the effects of controllable cost, improved flexibility, and wide application range
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Embodiment 1
[0075] Example 1, 3μm silicon gate CMOS double top layer metal process
[0076] Modify the design rules to allow DUP. When designing, place the active area of the circuit CMOS device and the polycrystalline pattern under the metal 1 pad to realize DUP, and follow the steps below to tape out.
[0077] Step 1, forming an active region,
[0078] Use an N-type doped wafer with a resistivity of 1 Ohm cm and a crystal orientation of (100) as the silicon substrate. The resistivity corresponds to a higher doping concentration. pad oxygen and The silicon nitride, then, define the field area by photolithography and etching silicon nitride, the area where the silicon nitride is etched will form the field area in the future, the area covered by silicon nitride is the active area, and the active area is divided into The active area of NMOS and the active area of PMOS;
[0079] Step 2, forming a P well,
[0080]Through photolithography and implantation, a P well is formed in th...
Embodiment 2
[0095] Example 2, 0.5 μm silicon gate CMOS double top layer metal process
[0096] Modify the design rules to allow DUP. When designing, place the CMOS device with a complete circuit, including the active area, polycrystalline, hole and metal 1 pattern, under the metal 2 pad to realize DUP, and tape it out according to the following steps.
[0097] Step 1, forming an active region,
[0098] Using a P-type doped wafer with a resistivity of 20 Ohm·cm and a crystal orientation of (100) as the silicon substrate, firstly grow the wafer with a thickness of pad oxygen and The silicon nitride, then, define the field area by photolithography and etching silicon nitride, the area where the silicon nitride is etched will form the field area in the future, the area covered by silicon nitride is the active area, and the active area is divided into The active area of NMOS and the active area of PMOS;
[0099] Step 2, forming N well and P well,
[0100] Through photolithography an...
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