Enhanced gallium nitride high-electron-mobility transistor and preparation method thereof
A high electron mobility, gallium nitride technology, applied in the field of enhanced gallium nitride high electron mobility transistors and its preparation, can solve the problems of difficult process control, low batch repeatability, unstable device performance, etc. problem, to achieve high device transconductance performance and microwave gain performance, easy control of the process, and high device reliability
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0045] See figure 1 , figure 1 It is a schematic structural diagram of an enhancement-mode gallium nitride high electron mobility transistor provided by an embodiment of the present invention, including:
[0046] A wafer 1, a source electrode 2 and a drain electrode 3 arranged on the wafer 1, a gate electrode 4 arranged on the wafer 1 and between the source electrode 2 and the drain electrode 3; wherein,
[0047] Wafer 1 includes GaN epitaxial structures;
[0048] An amorphous material region 5 is disposed in the wafer 1 , and the amorphous material region 5 is located under the gate electrode 4 .
[0049] Further, the width of the amorphous material region 5 is the same as the gate foot width of the gate electrode 4 .
[0050] In this embodiment, the amorphous material region 5 is formed by performing ion implantation on the wafer 1, wherein the implanted ions are nitrogen ions, argon ions, krypton ions or xenon ions, or other ions.
[0051] Specifically, in this embodime...
Embodiment 2
[0080] On the basis of the first embodiment above, this embodiment provides a method for manufacturing an enhancement-mode gallium nitride high electron mobility transistor. See image 3 , image 3 It is a flowchart of a method for manufacturing an enhancement-mode gallium nitride high electron mobility transistor provided in an embodiment of the present invention, including the following steps:
[0081] S1: Fabricate a wafer including a gallium nitride epitaxial structure, specifically including:
[0082] S11: Select high-resistance silicon with a crystal orientation of 111 as the substrate.
[0083] S12: sequentially preparing a Group-III nitride composite buffer zone, channel layer, and composite barrier region on the high-resistance silicon substrate.
[0084] Specifically, MOCVD (Metal-organic Chemical Vapor Deposition) equipment and technology are first used to epitaxially grow a nucleation region, a transition region and a core buffer zone on a high-resistance silico...
Embodiment 3
[0106]On the basis of the above-mentioned embodiment 2, this implementation provides a detailed preparation method to prepare and form the enhanced gallium nitride high electron mobility transistor described in the above-mentioned embodiment 1, which specifically includes the following steps:
[0107] Step 1: Using MOCVD equipment and technology to epitaxially grow III-GaN material on the high-resistance silicon substrate 11, and fabricate a wafer 1 with GaN high electron mobility transistor epitaxial structure. See Figure 4a~4h , Figure 4a~4h It is a schematic diagram of a fabrication method of a wafer with a gallium nitride high electron mobility transistor epitaxial structure provided by an embodiment of the present invention, specifically as follows:
[0108] 1a) Select high-resistance silicon with a crystal orientation of (111) as the substrate 11, such as Figure 4a shown;
[0109] 1b) Using MOCVD equipment and technology, epitaxially grow a nucleation layer 21 with...
PUM
| Property | Measurement | Unit |
|---|---|---|
| electrical resistivity | aaaaa | aaaaa |
| thickness | aaaaa | aaaaa |
| thickness | aaaaa | aaaaa |
Abstract
Description
Claims
Application Information
Login to View More