Semiconductor isolation structure and manufacturing method thereof

Abstract

The invention provides a semiconductor isolation structure and a manufacturing method thereof. According to the manufacturing method, a plurality of grooves are formed in the semiconductor substrate,then a pull-back process is executed to enable the side walls of a pad oxide layer and a hard mask layer on the semiconductor substrate to shrink inwards, the grooves are filled with the first isolation dielectric layer, and then an ion implantation process is executed to enable the upper portion of the first isolation dielectric layer to form a modified area. The depth of the modified area is greater than or equal to the total thickness of the pad oxide layer and the hard mask layer, a part of the first isolation dielectric layer in the modified area is removed by soaking with an etching solution, holes in the first isolation dielectric layer are opened or even removed, and the second isolation dielectric layer is filled in the grooves, so that the holes in the isolation dielectric in thegrooves can be reduced, and the performance of the semiconductor device is improved. The groove filling quality and the performance of the semiconductor isolation structure are improved. The semiconductor isolation structure is obtained by using the manufacturing method.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor isolation structure and a manufacturing method thereof. Background technique [0002] In today's semiconductor process technology, the shallow trench isolation (Shallow Trench Isolation, STI) process is one of the most important and complex processes in the front-end process. The basic requirement for the shallow trench isolation process is: when a large number of transistor devices are integrated into smaller and smaller chips, it can play a good role in insulating and isolating each tiny device, and at the same time it will not affect the operating characteristics of these devices. [0003] A manufacturing method of an existing semiconductor isolation structure includes the following steps: first, a pad oxide layer and a patterned hard mask layer are successively formed on a semiconductor substrate such as a silicon wafer; and then the patterned hard mas...

AI Technical Summary

Problems solved by technology

However, research has found that after the pullback process is performed, the sidewalls of the pad oxide layer tend to shrink below the hard mask layer, causing step-like depressions on the sidewalls of the trench, and the upper part of the isolation dielectric is easy to be removed in the subsequent filling process. Voids are generated, resulting in poor filling effect and affecting the performance of the isolation structure

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