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Wide bandgap power semiconductor device and preparation method

A power semiconductor and wide bandgap technology, which is applied in the field of wide bandgap power semiconductor devices and its preparation, can solve the problems of high electric field of the gate oxide layer and low channel mobility

Active Publication Date: 2021-02-19
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] In view of the above problems, the present invention provides a wide bandgap power semiconductor device and its preparation method, which are used to at least partially solve the technical problems of low channel mobility and excessively high electric field in the gate oxide layer of traditional semiconductor devices.

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  • Wide bandgap power semiconductor device and preparation method

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preparation example Construction

[0047] The second embodiment of the present disclosure provides a method for fabricating a wide bandgap power semiconductor device, please refer to figure 2 , including: S11, cleaning the substrate, ion-implanting the p-type doped layer, the n+ source region layer and the p+ base region layer in the substrate, the distribution of the p-type doped layer 40 is asymmetrical in the scope of one cell, and the n+ source region layer The region layer 50 is adjacent to the p+ base region layer 60; S12, etching the trench 70, the bottom of the trench 70 does not exceed the bottom of the p-type doped layer 40, and its right side wall is closely adjacent to the boundary of the p-type doped layer 40, which There is a gap between the left side wall and the boundary of the p-type doped layer 40; S13, making a gate oxide layer 80 on the trench 70 and the upper surface of the substrate; S14, depositing highly doped polysilicon in the trench 70, and etching to obtain a gate electrode contact ...

Embodiment 1

[0063] Step S11: Refer to Figure 4 , cleaning the SiC substrate, the SiC substrate epitaxially grows a multi-layer SiC epitaxial layer on the n+ type SiC substrate 10 to form a sandwich structure, which is as follows from bottom to top: n-type buffer layer 20, n-drift layer 30, followed by surface cleaning, specifically:

[0064] a. Use acetone and ethanol to ultrasonically clean three times in sequence, and then rinse with deionized water.

[0065] b. Put the SiC epitaxial material substrate after organic ultrasonication into concentrated sulfuric acid and hydrogen peroxide solution and cook for at least 10 minutes.

[0066] c. Boil the SiC epitaxial material substrate boiled in concentrated sulfuric acid with No. 1 solution and No. 2 solution for 15 minutes, rinse with deionized water, and blow dry with nitrogen gas for use. The No. 1 liquid is a mixture of ammonia, hydrogen peroxide and deionized water, the volume ratio of ammonia: hydrogen peroxide: deionized water = 1:...

Embodiment 2

[0085] Step S21: Refer to Figure 12 , cleaning the SiC substrate, the SiC substrate epitaxially grows multiple layers of SiC epitaxial layers on the n+ type SiC substrate 10 to form a sandwich structure, and the order from bottom to top is: n type buffer layer 20, n type coupling drift Layer 31 and n-type accumulation layer 32, the doping concentration of n-type accumulation layer 32 is lower than the concentration of n-type coupling drift layer 31, then carry out surface cleaning, specifically:

[0086] a. Use acetone and ethanol to ultrasonically clean three times in sequence, and then rinse with deionized water.

[0087] b. Put the SiC epitaxial material substrate after organic ultrasonication into concentrated sulfuric acid and hydrogen peroxide solution and cook for at least 10 minutes.

[0088] c. Boil the SiC epitaxial material substrate boiled in concentrated sulfuric acid with No. 1 solution and No. 2 solution for 15 minutes, rinse with deionized water, and blow dry...

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Abstract

The invention provides a wide bandgap power semiconductor device and a preparation method, the wide bandgap power semiconductor device comprises a semiconductor substrate, wherein a p-type doped layer(40), an n + source region layer (50) and a p + base region layer (60) are formed in the substrate, the p-type doped layer (40) is asymmetrically distributed left and right in a cellular range, and the n + source region layer (50) is adjacent to the p + base region layer (60); a gate electrode contact (90), wherein the bottom of the gate electrode contact does not exceed the bottom of the p-typedoped layer (40), the right side wall of the gate electrode contact is adjacent to the boundary of the p-type doped layer (40), a gap is formed between the left side wall of the gate electrode contactand the boundary of the p-type doped layer (40), and the gate electrode contact is separated from the substrate through a gate oxide layer (80); a passivation layer (100); a source electrode metal contact (110); and a drain contact (120). The wide bandgap power semiconductor device provided by the invention comprises an accumulation type channel and an inversion type channel in one cell, and hasgood conduction performance and gate oxide reliability.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to a wide bandgap power semiconductor device and a preparation method. Background technique [0002] Silicon carbide (SiC) has the characteristics of wide band gap, high thermal conductivity, high breakdown field strength, and high saturation electron drift rate. Compared with traditional silicon (Si) materials, it has excellent physical and electrical properties, and also has Excellent physical and chemical stability, strong radiation resistance and mechanical strength. Therefore, SiC-based wide bandgap materials are very suitable for making high-temperature, high-power, high-frequency, high-radiation and other power electronic devices. The MOSFET with a vertical silicon carbide trench gate structure has a non-polar channel surface and has higher mobility and higher cell integration, making the silicon carbide trench MOSFET the next generation of power electronic dev...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L29/10H01L29/16H01L29/423H01L21/336H01L21/331H01L29/739H01L29/78
CPCH01L29/0684H01L29/1608H01L29/1025H01L29/42364H01L29/78H01L29/7393H01L29/66325H01L29/66477
Inventor 申占伟刘兴昉闫果果王雷赵万顺孙国胜曾一平
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI