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Heterojunction PIN diode based on P-type gallium nitride and manufacturing method thereof

A PIN diode and heterojunction technology, applied in the field of microelectronics, can solve the problems of high on-resistance of PIN diodes, difficult preparation of P-type Ga, and high power consumption of devices, so as to improve device performance, promote heat dissipation, and reduce power consumption. Effect

Pending Publication Date: 2022-08-05
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, the on-resistance of the vertical PIN diode is high, resulting in high power consumption of the device and degraded performance
At the same time for the preparation of vertical Ga 2 o 3 For PIN diodes, P-type Ga 2 o 3 Difficulty in preparation is a common problem faced by all scientific researchers

Method used

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  • Heterojunction PIN diode based on P-type gallium nitride and manufacturing method thereof
  • Heterojunction PIN diode based on P-type gallium nitride and manufacturing method thereof
  • Heterojunction PIN diode based on P-type gallium nitride and manufacturing method thereof

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Embodiment 1

[0035] See figure 1 , figure 1 This is a schematic structural diagram of a heterojunction PIN diode based on P-type gallium nitride according to an embodiment of the present invention.

[0036] The heterojunction PIN diode based on P-type gallium nitride includes N-type Ga 2 O 3 Substrate 1, N-type Ga 2 O 3 Epitaxial layer 2 , P-type GaN layer 3 , several P-type GaN regions 4 , N-region ohmic contact region 5 and P-region ohmic contact region 6 .

[0037] Among them, N-region ohmic contact region 5, N-type Ga 2 O 3 Substrate 1, N-type Ga 2 O 3 The epitaxial layer 2 and the P-type GaN layer 3 are stacked in this order. Several P-type GaN regions 4 are distributed on the P-type GaN layer 3 , and the doping concentration of the several P-type GaN regions 4 is greater than that of the P-type GaN layer 3 . The P-region ohmic contact region 6 covers the P-type GaN layer 3 and the surfaces of several P-type GaN regions 4 .

[0038] Specifically, the plurality of P-type GaN...

Embodiment 2

[0050] On the basis of Example 1, please refer to image 3 and Figures 4a-4e , image 3 A schematic flowchart of a method for preparing a heterojunction PIN diode based on P-type gallium nitride provided by an embodiment of the present invention, Figures 4a-4e This is a schematic process diagram of a method for fabricating a P-type gallium nitride-based heterojunction PIN diode according to an embodiment of the present invention.

[0051] The preparation method of the heterojunction PIN diode based on P-type gallium nitride includes the steps:

[0052] S1, in N-type Ga 2 O 3 N-type Ga is grown on one side of substrate 1 2 O 3 Epitaxial layer 2, see Figure 4a .

[0053] First, for N-type Ga 2 O 3 Substrate 1 undergoes standard cleaning. Then, the cleaned N-type Ga 2 O 3 The substrate 1 is placed in a metal-organic chemical vapor deposition (Metal-organic Chemical Vapor Deposition, MOCVD) equipment, and the flow rate of trimethylgallium TMGa is 5.0×10 -6 ~9.0×10...

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Abstract

The invention relates to a heterojunction PIN diode based on P-type gallium nitride and a manufacturing method thereof, the PIN diode comprises an N-type Ga2O3 substrate, an N-type Ga2O3 epitaxial layer, a P-type GaN layer, a plurality of P-type GaN regions, an N-region ohmic contact region and a P-region ohmic contact region, the N-region ohmic contact region, the N-type Ga2O3 substrate, the N-type Ga2O3 epitaxial layer and the P-type GaN layer are stacked in sequence; the plurality of P-type GaN regions are distributed on the P-type GaN layer, and the doping concentration of the plurality of P-type GaN regions is greater than that of the P-type GaN layer; and the P-region ohmic contact region covers the P-type GaN layer and the surfaces of the plurality of P-type GaN regions. According to the PIN diode, a plurality of P-type GaN regions with relatively high doping concentration are distributed on the P-type GaN layer, and the heavily doped P-type GaN regions increase the contact area of a P region ohmic contact region and P-type GaN, so that the on resistance of the PIN diode can be reduced, the power consumption of a device is reduced, the performance of the device is improved, and meanwhile, the problem of preparing P-type Ga2O3 is also avoided.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a heterojunction PIN diode based on P-type gallium nitride and a manufacturing method thereof. Background technique [0002] β-Ga 2 O 3 It is a group III semiconductor oxide with a forbidden band width of 4.9eV. Because β-Ga 2 O 3 It is widely used in high-power electronics, ultraviolet optoelectronic devices, and solar-blind ultraviolet detection, so β-Ga 2 O 3 become more and more attractive. In high-power electronic devices, vertical PIN diodes exhibit the advantages of small reverse leakage current and high breakdown voltage, and have excellent power characteristics. They are widely used in electronic equipment in the military and civilian fields and are indispensable. key device. [0003] However, the on-resistance of the vertical PIN diode is relatively high, resulting in high power consumption and reduced performance of the device. At the same...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/868H01L29/267H01L23/373H01L29/45H01L21/329
CPCH01L29/868H01L29/267H01L23/3738H01L29/452H01L29/66219Y02P70/50
Inventor 马晓华张濛贾富春王雨晨杨凌侯斌武玫朱青郝跃
Owner XIDIAN UNIV