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Laminated capacitor and its mfg. method

A manufacturing method and technology of capacitors, applied in the direction of capacitor manufacturing, laminated capacitors, capacitors, etc., can solve the problem of not being able to be used as a capacitor

Inactive Publication Date: 2003-12-10
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, since there is no metal layer in the electrical insulating portion 13, as Figure 7 As shown in the enlarged view of the electrical insulating part 13 of
And once the number of laminations exceeds 1000, such as Figure 8 As shown, it is possible that the electrical insulating portion 13 forms a large depression
In this case, the internal electrodes 11 are cut off or short-circuited between layers, and cannot function as capacitors.
Furthermore, if the thickness of the dielectric layer is reduced to a thickness that is impossible in conventional film capacitors, this problem will be caused more significantly

Method used

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  • Laminated capacitor and its mfg. method
  • Laminated capacitor and its mfg. method
  • Laminated capacitor and its mfg. method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0020] In Example 1, using figure 1 Devices were fabricated as indicated. figure 2 A~ figure 2 C represents the manufacturing process of the multilayer capacitor of the present invention. The degree of vacuum in the vacuum vessel 5 is set to 2×10 -2 Pa. The outer peripheral surface of the container drum 1 was kept at 5°C. As a reactive monomer for the dielectric material, dicyclopentadiene dimethanol diacrylate was used. The monomer is vaporized by the vapor deposition source 2 and deposited on the outer peripheral surface of the container drum 1 . In addition, any reactive monomer can be used as long as it is easy to vapor-deposit and the film after polymerization is good. Polyfunctional acrylates, polyfunctional methacrylates, polyfunctional vinyl ethers, and the like are preferably used.

[0021] Then, an electron beam curing device is used as the curing device 8 . And curing the deposited dielectric material. At this time, the thickness of the formed dielectric...

Embodiment 2

[0023] In Example 2, using figure 1 Devices were fabricated as indicated. All the same as in Example 1 up to step A. image 3 A indicates the state after process A is completed. Next, the procedure for flattening the electrical insulating portion recess 14 will be described. First, the metal vapor deposition source 4 is cut off with a shutter, and the resin layer 21 is formed by repeating lamination and curing 500 to 1000 times through the monomer vaporization source 2 and the curing device 8 . Then the monomer evaporation source 2 is cut off by the baffle. and, if image 3 As shown in B, the resin layer 21 is irradiated with argon plasma by the resin surface treatment device 9 . At this time, cutting is selectively performed from the corners of the recessed portion of the resin layer 21 , and finally the entire recessed portion can be buried with the resin layer 21 . and if image 3 As shown, the surface of the laminate can be flattened. In this embodiment, argon gas...

Embodiment 3

[0026] In Example 3, using figure 1 Fabrication setup shown. All the same as in Example 1 up to step A. Figure 4 A indicates the state after process A is completed. Next, the procedure for flattening the electrical insulating portion recess 14 will be described. First, the monomer vaporization source 2 is cut off by the shutter, and the metal vapor deposition source 4 is cut off by the pattern portion imparting shutter 31 . Then, if Figure 4 As shown in B, the metal layer 32 is laminated by passing through the patterned part and repeating about 500 to 1000 times. and if Figure 4 As shown in C, the concave portion produced by the electrical insulating portion is buried and the surface of the laminate is flattened. By repeating the above operations, a laminate of about 1.6 mm was formed. Starting from this laminate, a chip capacitor was obtained in the same manner as in Example 1. This chip capacitor has the same capacitor characteristics and solder heat resistance a...

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Abstract

The present invention provides a multi-layer capacitor that can be highly downsized and increased in capacity. A present invention provides a method for manufacturing the multi-layer capacitor including a process of forming a dielectric in the same vacuum chamber, a process of treating a surface of the dielectric, a process of forming a pattern in a metal electrode, a process of forming the metal electrode, and a process of treating a surface of the metal electrode. In this method, etching the dielectric layer flattens a recessed part generated by an electric insulation part.

Description

technical field [0001] The present invention relates to a laminated capacitor composed of a dielectric layer and a metal thin film layer and its manufacturing method. Background technique [0002] In recent years, miniaturization and high performance have been strongly demanded for entire electronic components including capacitors. The capacitance of the capacitor is proportional to the area of ​​the electrode plates and inversely proportional to the distance between the electrodes. In this case, the thickness of the dielectric is the distance between the electrodes. When the dielectric constant of the dielectric is the same, increasing the area of ​​the electrode plate or reducing the thickness of the dielectric layer is the condition for increasing the capacitance of the capacitor. In other words, an effective way to miniaturize a capacitor while maintaining or increasing its capacitance is to make the thickness of the dielectric layer thinner and to make the effective a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01G4/30H01G4/012H01G4/06H01G4/228H01G4/35H01G7/00H01G13/00
CPCY10T29/49798H01G4/012Y10T29/435Y10T29/49002H01G4/30
Inventor 新井康司山田雄一郎
Owner PANASONIC CORP
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