Method for concurrently forming silicon wafer suede and PN junction during solar cell manufacture
A solar cell, PN junction technology, applied in the direction of final product manufacturing, sustainable manufacturing/processing, circuits, etc., can solve the problems of low product qualification rate, easy to cause pollution, high manufacturing cost, shorten the process time, prevent workpiece pollution , The effect of simplifying the production line
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[0013] The method for forming textured structure and PN junction simultaneously on the surface of the P-type silicon chip of the present invention comprises the following process steps:
[0014] Step 1, silicon wafer surface cleaning treatment, the specific treatment conditions are, use 5±1% HF, add 5±1% HCL and the remaining amount of reverse osmosis water to form a mixed solution, and clean at room temperature for 5-6 minutes.
[0015] Step 2, low-temperature drying. The specific drying method is to dry with hot air at 60±5°C, and the drying time is 20±2 minutes.
[0016] Step 3, after the cleaning treatment, the silicon wafer is transported to the LPCVD furnace tube for processing, and a textured structure and a PN junction are formed on the surface of the silicon wafer at the same time. The processing conditions are: the vacuum degree in the furnace tube is kept at 100-300 millitorr, preferably The vacuum degree is 100 millitorr (mTorr), the temperature range is 520°C-580°...
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