Si-CONTAINING POLYMERS FOR NANO-PATTERN DEVICE FABRICATION

Abstract

A resist polymer that has nano-scale patterns located therein that are in the form of sub lithographic hollow pores (or openings) that are oriented in a direction that is substantially perpendicular with that of its major surfaces (top and bottom) is provided. Such a resist polymer having the nano-scale patterns is used as an etch mask transferring nano-scale patterns to an underlying substrate such as, for example, dielectric material. After the transferring of the nano-scale patterns into the substrate, nano-scale voids (or openings) having a width of less than 50 nm are created in the substrate. The presence of the nano-scale voids in a dielectric material lowers the dielectric constant, k, of the original dielectric material. In accordance with an aspect of the present invention, the inventive resist polymer comprises a copolymer that includes a first monomer unit (A) that contains a Si-containing component, and a second monomer unit (B) that contains an organic component, wherein said two monomer units (A and B) have different etch rates.

Description

FIELD OF THE INVENTION[0001]The present invention relates to semiconductor device manufacturing, and more particularly to a method for manufacturing sub lithographic openings in a Si-containing material, which material is then subsequently used as an etch mask for transferring the sub lithographic openings to an underlying dielectric material. The presence of the sub lithographic openings in the dielectric material lowers the overall dielectric constant of the dielectric material.BACKGROUND OF THE INVENTION[0002]To fabricate microelectronic semiconductor devices such as an integrated circuit (IC), many different layers of metal and insulation are selectively deposited on a semiconductor. The insulation layers may be, for example, silicon dioxide, silicon oxynitride, fluorinated silicate glass (FSG) and the like. These insulation layers are deposited between the metal layers, i.e., interlevel dielectric (ILD) layers, and may act as electrical insulation therebetween or serve other kn...

AI Technical Summary

Benefits of technology

[0007]The present invention solves the above and other problems by creating a resist polymer that has nano-scale patterns located therein that are in the form of sub lithographic hollow pores (or openings) that are oriented in a direction that is substantially perpendicular with that of its major surfaces (top and bottom). Such a resist polymer having the nano-scale patterns is used as an etch mask for tran

Problems solved by technology

However, use of organic low-k dielectric materials such as, for example, SiLK® (manufactured by Dow Chemical Co., Midland, Mich.) tend to have lower mechanical strength than conventional dielectric materials such as, for example, silicon oxide.

This typically consists of new manufacturing processes and tool sets which add to the overall cost of the fabrication of the semiconductor device.

Also, in sub-resolution lithographic processes, it is necessary to etch wide troughs in empty spaces which, in turn, cannot be pinched off by ILD PECVD deposition.

This, of course, affects the overall electrical properties of the device.

Also, air gaps can occur near the vias from a higher level, which create the risk of plating bath or metal fill at these areas.

Lastly, in known processes, there is also the requirement of providing an isotropic etch which may etch underneath the interconnect thus leaving it unsupported or floating and, thus degrading the entire structural and electrical performance of the device.

Images