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Structure for forming dual-pole integrated circuit contact hole and contact hole making method

A technology of integrated circuits and manufacturing methods, applied in the direction of circuits, semiconductor/solid-state device manufacturing, electrical components, etc.

Inactive Publication Date: 2011-08-31
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But in this case, it is necessary to strictly control the process conditions, which increases the difficulty of the process, reduces the window of process conditions, and reduces the yield

Method used

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  • Structure for forming dual-pole integrated circuit contact hole and contact hole making method
  • Structure for forming dual-pole integrated circuit contact hole and contact hole making method
  • Structure for forming dual-pole integrated circuit contact hole and contact hole making method

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Experimental program
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Embodiment Construction

[0019] The sacrificial layer 7 covers the middle of the upper surface of the silicon nitride 3 . The low temperature oxide 2 covers the sacrificial layer 7 and the upper surface of the silicon nitride 3 not covered by the sacrificial layer 7 . A contact hole 9 is provided in the middle of the photoresist 1 to expose the low temperature oxide 2 . The sacrificial layer 7 and the contact hole 9 have the same size.

[0020] The method for manufacturing the bipolar integrated circuit interconnection structure of the present invention comprises the following steps: first grow an isolation dielectric layer 4 on the lower layer material 5, adopt chemical vapor deposition (CVD) to deposit silicon nitride 3; The patterned mask plate obtains the pattern of the contact hole 9 on the silicon nitride 3 by photolithography. Then the sacrificial layer 7 is deposited by chemical vapor deposition in the area defined by the pattern of the contact hole 9, and the sacrificial layer 7 other than ...

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Abstract

The present invention provides a structure for forming a bipolar integrated circuit contact hole comprising at least: bottom material, an isolation media layer, silicon nitride, low-temperature oxide and photoresist grown on the bottom material in turn, wherein the photoresist is provided with a contact hole on center and a sacrifice layer is arranged between the silicon nitride and the low-temperature oxide. The present invention also provides a method for manufacturing the bipolar integrated circuit contact hole. Compared with prior art, the sacrifice layer in an interconnection structure plays a striking role in overcoming undercutting phenomenon and can obtain an ideal contact hole structure when undercutting the contact hole which is benefit to the following procedure of preventing layer deposition and metal deposition, thus improving the product yield. Furthermore, the structure for forming a bipolar integrated circuit contact hole provided by the present invention uses gas of fluorocarbon class for undercutting the sacrifice layer and uses fluorine-containing gas for undercutting the sacrifice layer on the silicon nitride so as to insure uniformity of each layer of medium, thus reducing erosion to the bottom material.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit technology, and in particular relates to a bipolar integrated circuit. Background technique [0002] With the continuous development of Internet technology, information technology and communication technology, people's requirements for integrated circuit performance are getting higher and higher, which in turn promotes the development of integrated circuit manufacturing technology in the direction of high density, large capacity, high speed and low power consumption. . As the chip runs faster and faster, how to maintain low power consumption and low heat generation, prolong the use time, and maximize the overall performance of the chip has become one of the keys to integrated circuit manufacturing. [0003] The conduction of the integrated circuit is accomplished by metal wiring, and the width and length of the metal line directly affect the delay time of the chip. The metal wiring is...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/311H01L21/768H01L23/532
Inventor 刘北平
Owner SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT