Copper inter-linkage flip-chip LED and its preparing process
A technology of light-emitting diodes and flip-chips, which is applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve the problems of large-scale production constraints and high costs of flip-chip light-emitting diodes, and achieve good application prospects and markets Prospect, simplification of production process, reduction of production cost and the effect of production cycle
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Embodiment 1
[0039] Referring to Fig. 1, Fig. 2, Fig. 3 and Fig. 4, the copper interconnected flip-chip light-emitting diode includes a light-emitting diode chip, a substrate 5, and an interconnection electrode between the light-emitting diode chip and the substrate 5, and the interconnection electrode is made of copper electrode. The LED chip is composed of P electrode 2 , N electrode 3 , P-type gallium nitride 9 , N-type gallium nitride 8 and sapphire substrate 1 . There are metal pads on the surfaces of the P electrode 2 , the N electrode 3 , the P-type GaN 9 and the N-type GaN 8 . The metal pad is composed of a single-layer or multi-layer metal film. The material of the metal thin film is any one of chromium, copper, gold, nickel, aluminum, platinum, titanium, tungsten and palladium. There is an insulating layer 6 on the substrate 5, and there is a metallization layer 4 on the insulating layer 6, and a circuit pattern corresponding to the P electrode 2 and the N electrode 3 of the LE...
Embodiment 2
[0043] Fig. 4 is also a schematic structural diagram of the second embodiment of the present invention, which is basically the same as the above-mentioned embodiment, except that the manufacturing method of this embodiment uses a flip-chip light-emitting diode chip without metal pads. Its preparation process is as follows:
[0044] Prepare a silicon substrate 5 as a substrate for interconnecting with light-emitting diode chips; deposit a layer of silicon oxide on the silicon substrate as an insulating layer 6, and use silicon oxide, silicon nitride or silicon carbide materials to prepare, and the preparation method can be Evaporation, sputtering, and chemical vapor deposition techniques are used. Deposit silver or aluminum metal contact layer 4 on silicon oxide subsequently, thickness range is 100 nanometers to 100 microns, and through etching, make the pattern corresponding to light-emitting diode P electrode 2, N electrode 3 as connecting circuit; Copper bumps are patterned...
Embodiment 3
[0046] Fig. 5 is a schematic structural diagram of a third embodiment of the present invention. This embodiment is basically the same as the first embodiment, except that the manufacturing method uses a square copper bump array. Its preparation process is as follows:
[0047] Prepare a silicon substrate 5 as a substrate for interconnecting with light-emitting diode chips; deposit a layer of silicon oxide on the silicon substrate as an insulating layer 6, and use silicon oxide, silicon nitride or silicon carbide materials to prepare, and the preparation method can be Evaporation, sputtering, and chemical vapor deposition techniques are used. Deposit silver or aluminum metal contact layer 4 on silicon oxide subsequently, thickness range is 100 nanometers to 100 microns, and through etching, make the pattern corresponding to light-emitting diode P electrode 2, N electrode 3 as connecting circuit; Copper pillars are graphically fabricated as interconnection electrodes 7 . Coppe...
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Abstract
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