Method for preparing carbon nano tube thin-film field-effect transistor

Abstract

The invention relates to a method for preparing a carbon nano tube thin-film field-effect transistor of a nano-electrical appliance, comprising the following steps: producing S / D electrode patterns on silicon chips with surface thereof provided with an insulating barrier by adopting the optical lithography; depositing the carbon nano tubes between S / D electrodes to form the carbon nano tube thin-film by dielectrophoresis in an alternative electric field; then using the method of plasma etching to selectively remove metallic carbon nano tubes in the deposited carbon nano tubes to obtain carbonnano tube thin-film field-effect transistor with fine properties; the other method comprises the following steps: depositing the carbon nano tubes on silicon chips with surface thereof provided with an insulating barrier by means of self-assembly to form the carbon nano tube thin-film; then producing S / D electrode patterns on the carbon nano tube thin-film by the optical lithography; finally using the method of plasma etching to selectively remove metallic carbon nano tubes in the deposited carbon nano tubes to obtain carbon nano tube thin-film field-effect transistor with fine properties.

Description

technical field [0001] The invention relates to a preparation method in the technical field of nanoelectronic devices, in particular to a preparation method of a carbon nanotube thin film field effect transistor. Background technique [0002] People have invested a lot of research on carbon nanotube transistors and made some progress. At present, the preparation methods of carbon nanotube field effect transistors mainly include the following: 1. Using microphysical manipulation methods to move carbon nanotubes to electrodes. , such as the method of AFM probe toggling, which can precisely control carbon nanotubes, but the operation is very difficult, the efficiency is very low, and it is difficult to achieve large-scale production; 2. Using CVD to grow carbon nanotubes on the surface of silicon wafers , so that it is connected to the source and drain electrodes. Although this method can control the growth position of carbon nanotubes through the catalyst, the growth direction...

AI Technical Summary

Problems solved by technology

Its shortcoming is: the carbon nanotubes in the array carbon nanotube film that this method makes piles up together, can't effectively evenly disperse, and this will make carbon nanotubes and source-drain electrode can't form good ohmic contact, carbon nanotubes There is a coupling effect between them, which affects the performance of the transistor

Moreover, the size of the source-drain electrodes used in the fabrication of arrayed carbon nanotube thin film transistors by this method is very large, with a pitch of 0.1-0.5 millimeters and a width of 50-66 millimeters, while the size of transistors in integrated circuits is much smaller than this, so this method cannot Adapt to the increasingly shrinking feature size of the current microelectronics and integrated circuit industry