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SOI device resistant to total dose radiation and manufacturing method thereof

A technology of anti-total dose and manufacturing method, which is applied in the electronic field, can solve the problems of increasing power consumption of CMOS integrated circuits, deterioration of sub-threshold slope, and deterioration of device reliability, so as to reduce off-state leakage current and suppress inversion , the effect of increasing the distance

Inactive Publication Date: 2010-10-13
PEKING UNIV
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  • Abstract
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  • Application Information

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Problems solved by technology

In SOI devices, these fixed positive charges in the buried oxide layer made of silicon dioxide materials will cause the substrate inversion of the device, and bring about adverse effects such as deterioration of the subthreshold slope and deterioration of device reliability. It has a great negative impact on the reliability of CMOS integrated circuits, and the existence of fixed positive charges in the buried oxide layer will also cause the carrier inversion of the substrate. These inversion carriers play a role in the source-drain bias A large source-drain conduction current is formed under the condition, so that the device still has a large source-drain conduction current when the gate voltage is much lower than the threshold voltage, that is, the off state, which increases the power consumption of the CMOS integrated circuit and causes a series of reliability issues

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  • SOI device resistant to total dose radiation and manufacturing method thereof
  • SOI device resistant to total dose radiation and manufacturing method thereof
  • SOI device resistant to total dose radiation and manufacturing method thereof

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Embodiment Construction

[0023] The present invention will be further described below through a specific preparation example in conjunction with the accompanying drawings.

[0024] This embodiment prepares the SOI device according to the present invention, and the preparation method mainly includes the following steps:

[0025] 1) if image 3 As shown, a silicon dioxide layer 21 is grown on the silicon wafer 11 by a thermal oxidation growth method, that is, a buried oxide layer in the traditional sense, the thermal oxidation temperature is about 1050°C, and the thickness is about 70-80nm; Polishing and other methods planarize the surface of the silicon dioxide layer 21 , making the surface as favorable as possible for the uniform deposition of the next deposition layer.

[0026] 2) if Figure 4 As shown, a silicon nitride layer 41 of 10nm to 20nm is deposited on the surface of silicon dioxide 21 by low pressure chemical vapor deposition (LPCVD).

[0027] 3) if Figure 5 As shown, the surface is al...

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Abstract

The invention discloses an SOI device resistant to total dose radiation and a manufacturing method thereof, belonging to the field of electric technology. The SOI device comprises a substrate layer, a buried oxide layer and a top layer, wherein a sacrificial layer is arranged between the buried oxide layer and the substrate layer and generates negative charges after the SOI device is subjected to total dose radiation; the sacrificial layer is made of silicon nitride; the substrate layer is made of P-type silicon; and the buried oxide layer is made of silicon dioxide. The manufacturing method comprises the following steps: a) forming the SiO2 buried oxide layer on the silicon wafer; b) forming the silicon nitride sacrificial layer on the SiO2 buried oxide layer; and c) forming the P-type silicon substrate layer on the silicon nitride sacrificial layer. The invention can be applied to such industries related to total dose radiation as aerospace, military, nuclear power, high-energy physics and the like.

Description

technical field [0001] The invention relates to integrated circuits, in particular to a novel SOI device resistant to total dose radiation and a manufacturing method thereof, belonging to the field of electronic technology. Background technique [0002] Integrated circuit technology is being more and more widely used in industries related to total dose radiation, such as aerospace, military, nuclear power and high-energy physics. Moreover, with the continuous improvement of the integration level of integrated circuits, the size of semiconductor devices is decreasing day by day. Shallow trench isolation technology is becoming the mainstream technology for electrical isolation between devices in integrated circuits due to its excellent device isolation performance. However, due to the damage of the silicon dioxide oxide layer in the device due to the total dose of irradiated particles, a large amount of fixed positive charges will be generated in the oxide layer of the SOI dev...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12H01L21/762
Inventor 刘文郝志华黄如
Owner PEKING UNIV
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