ESD (electrostatic discharge) protection circuit optimization method of RFIC (radio frequency integrated circuit) based on network S-parameter extraction

A technology of parameter extraction and optimization method, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of inaccurate equivalent method, inaccurate equivalent, non-portability of ESD protection circuit, etc., and achieve multiple parasitic effects , accurate results
CN102096743AActive Publication Date: 2011-06-15XIDIAN UNIV
2 Cites 11 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
XIDIAN UNIV
Publication Date
2011-06-15

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention discloses an ESD (electrostatic discharge) protection circuit optimization method of an RFIC (radio frequency integrated circuit) based on network S-parameter extraction, and mainly solves the problems of poor accuracy and universality of the existing equivalent method and model construction method. The method mainly comprises the following steps: determining the parameters of an ESD protection device and a matching network of a port to be protected of the kernel RFIC; constructing a matching network with the ESD protection, and extracting S parameter through mixed-mode simulation; embedding the matching network into the kernel RFIC for optimized adjustment; returning and correcting the element parameters in the matching network to achieve further optimized design; and carrying out ESD testing to obtain the key parameter of the protection level. The method can accurately extract the device characteristics without constructing the complex numerical model, has higher accuracy and universality, and is suitable for the applicability evaluation and design optimization of the ESD protection device in a high-frequency circuit.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The invention belongs to the technical field of integrated circuits, relates to the electrostatic ESD protection optimization of radio frequency integrated circuits (RFICs), and can be used in the design of radio frequency integrated circuits. Background technique

[0002] With the continuous shrinking of the feature size of CMOS integrated circuits and the increase of operating frequency, the problem of ESD protection of radio frequency integrated circuits has become more and more serious. The protection level is not high and there is no unified method. The design is time-consuming and the effect is not good. Since the integrated circuit RFIC has a lot of integrated content, including radio frequency front-end circuits, digital storage circuits, control circuits and other non-radio frequency circuits, and the designed circuits are unpredictable, it often depends on design experience to choose among multiple solutions , In addition, because the tape-ou...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More