Charge pump circuit used for charge pump phase-locked loop

Abstract

The invention provides a charge pump circuit used for a charge pump phase-locked loop, and belongs to the technical field of electronics. The charge pump circuit comprises a charge and discharge unit, a first complementary circuit unit, a first operational amplifier unit, a phase inverter unit, a second complementary circuit unit, a current mirror unit and a second operational amplifier unit. According to the charge pump circuit, the problems of charge and discharge current matching and charge sharing of an existing charge pump circuit are resolved, the two complementary circuit units and the two operational amplifier units are used, the two complementary circuit units achieve forward and reverse complementation for the charge and discharge unit, charge currents and discharge currents for capacitors keep constant, therefore the problem of charge and discharge current changing is resolved, capacitor voltage linear variation of a charge pump is achieved, and charging and discharging for the capacitors can be accurately controlled. The charge pump circuit is simple in structure, easy to integrate, high in charge and discharge current source matching precision, and suitable for being used in low voltage and low power consumption.

Description

technical field [0001] The invention belongs to the field of electronic technology and relates to integrated circuit design technology, in particular to a charge pump circuit applied to a charge pump phase-locked loop. Background technique [0002] Phase-locked loop (PPL) is an important module in analog and digital-analog hybrid integrated circuits, and it is widely used in wireless communication, frequency synthesis, clock recovery, etc. Among various phase-locked loop structures, Charge Pump Phase-Locked Loop (CPPLL) is widely used in chip design because of its high stability, large capture range, and digital circuits for frequency and phase detectors. . [0003] A phase-locked loop is a feedback system that compares the phase of an input signal to an output signal. figure 1 Shown is a typical charge pump phase-locked loop system structure, including phase frequency detector (PFD), charge pump (CP), loop filter (LF), voltage controlled oscillator (VCO), frequency divide...

AI Technical Summary

Problems solved by technology

[0005] The disadvantages of this circuit are: 1. The current mismatch problem of the current mirror: due to the channel modulation effect, the V of the MP3 tube in the PMOS current mirror and the MN4 tube in the NMOS current mirror ds not equal, for example V cp ( figure 2 When the potential of point Y shown in ) is high, the drain voltage of MP4 and MN3 is high, then I ch dis , then during the reset pulse, MP4 and MN3 will be turned on, and the capacitor C cp will release the charge, V cp It will decrease and will not remain unchanged, which will affect the lower circuit

2. The problem of charge sharing: the MP3 tube in the PMOS current mirror and the MN4 tube in the NMOS current mirror are respectively close to the power supply and ground, and there is a certain capacitance in the

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