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Electron Blocking Layer Growth Method for Epitaxial Structures and Corresponding Epitaxial Structures

A technology of electronic blocking layer and epitaxial structure, which is applied in the manufacture of circuits, electrical components, semiconductors/solid-state devices, etc., can solve the problems of poor chip light efficiency improvement, reduce Droop effect, improve spillover, and increase activation efficiency Effect

Active Publication Date: 2016-03-30
XIANGNENG HUALEI OPTOELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a method for growing an electron blocking layer with an epitaxial structure and its corresponding epitaxial structure, so as to solve the technical problem that the current method has a poor effect on improving the light efficiency of the chip

Method used

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  • Electron Blocking Layer Growth Method for Epitaxial Structures and Corresponding Epitaxial Structures
  • Electron Blocking Layer Growth Method for Epitaxial Structures and Corresponding Epitaxial Structures
  • Electron Blocking Layer Growth Method for Epitaxial Structures and Corresponding Epitaxial Structures

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0055] The invention uses AixtronCruisIIMOCVD to grow high-brightness GaN-based LED epitaxial wafers. Using high-purity H 2 or high purity N 2 or high purity H 2 and high purity N 2 The mixed gas is used as carrier gas, high-purity NH3 is used as N source, trimethylgallium (TMGa) and triethylgallium (TEGa) are used as gallium source, trimethylindium (TMIn) is used as indium source, silane (SiH 4 ) as N-type dopant, trimethylaluminum (TMAl) as aluminum source, dimagnesocene (CP 2 Mg) is used as a P-type dopant, the substrate is (0001) sapphire, and the reaction chamber pressure is between 150mbar and 600mbar.

[0056] 1. Under the hydrogen atmosphere of 1050-1150℃, the pressure of the reaction chamber is controlled at 150-200mbar, and the sapphire substrate is treated at high temperature for 4-5 minutes;

[0057] 2. Lower the temperature to 550-580°C, control the pressure of the reaction chamber at 450-600mbar, and grow a low-temperature buffer layer GaN with a thickness o...

Embodiment 2

[0077] For the implementation steps, refer to Example 1 to obtain sample 4.

[0078] The comparison of growth parameters between Comparative Example 2 and Example 2 can be seen in Table 2 below.

[0079] Table 2 contrasts the growth parameters of Example two and Example two

[0080]

[0081] Then, take sample 3 and sample 4 to take the same treatment method as sample 1 and sample 2 and then test the photoelectric performance of sample 3 and sample 4, the parameters obtained can be found in Figure 6 . Figure 6 The vertical axis of is the light efficiency (Lm / w), and the horizontal axis is the number of chip particles. The value corresponding to sample 4 is the upper thicker line, and the value corresponding to sample 3 is the lower thinner line. From Figure 6 According to the data, the brightness of sample 4 is 6-7% higher than that of sample 3. The growth method provided by this patent improves the light efficiency of large-sized chips.

[0082] Based on the above ...

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Abstract

The invention provides a growth method of an electronic barrier layer of an epitaxial structure and the corresponding epitaxial structure. The electronic barrier layer of the epitaxial structure comprises 20-25 unit layers, wherein each unit layer sequentially comprises a well layer and a barrier layer from the bottom up; each well layer is a P-type InyGa(1-y)N layer with the thickness of 1-1.5nm; y is equal to 0.05-0.10; and each barrier layer is a GaN layer with the thickness of 1-1.5nm. According to the growth method and the epitaxial structure, a novel InGaN / GaN superlattice improves hole concentration, hole injection efficiency and electronic overflow of the traditional PAlGaN, reduces a Droop effect of a chip at heavy current, reduces quantum well damages, and greatly improves the luminous efficiency of the high-power LED (Light-emitting Diode) chip.

Description

technical field [0001] The present invention relates to the technical field of LED epitaxial design, in particular to an electron blocking layer growth method of an epitaxial structure and a corresponding epitaxial structure. Background technique [0002] In the LED market, large-size and high-power 30mil*30mil, 45mil*45mil, and 60mil*60mil chips are mostly used for lighting, and the quality of the products is directly related to the brightness of the chips. Therefore, the lumens / (watt*unit price) of chips of various sizes has become the focus of the high-power market value-oriented and packaging customers. [0003] At present, there are many epitaxial growth methods to improve large-scale light efficiency. Most of the structural innovations lie in the quantum well layer. For example, the traditional quantum well layer is designed as a step well quantum well to improve the recombination probability of electrons and holes; the traditional P layer The improvement method is ma...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/20H01L33/04
Inventor 张宇
Owner XIANGNENG HUALEI OPTOELECTRONICS
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