Blocking impurity band detector manufacturing method based on SOI

Abstract

The invention relates to a blocking impurity band detector manufacturing method based on an SOI. The method includes the steps that epitaxial is carried out on a top silicon layer made of SOI materials with an in-situ doping technology to grow an absorbing layer; heavy doping is carried out on the absorbing layer to grow a conducting layer; a high-resistance silicon wafer is bonded to the conducting layer; a bottom silicon layer of the SOI materials is removed with a deep silicon etching technology; a buried oxide layer of the SOI materials is removed with a wet etching technology; an electrode transition area is formed on the top silicon layer of the SOI materials with the ion implantation technology and the rapid thermal annealing technology; a micro-mesa is formed with a deep silicon etching technology, and a silicon nitride passivation layer is deposited; holes are formed in the silicon nitride passivation layer in an etched mode, and positive electrodes and negative electrodes are formed with an electron beam evaporation technology; electrode ohmic contact is formed with an annealing technology; the positive electrodes and the negative electrodes are thickened with an electron beam evaporation technology. According to the technical scheme, the quantum efficiency and the response ratio of a blocking impurity band detector are improved.

Description

technical field [0001] The invention relates to the preparation technology of infrared and terahertz detection devices, in particular to a preparation method of a detector based on SOI blocking impurity bands. Background technique [0002] The barrier impurity band detector is a highly sensitive far-infrared and terahertz wave detector, which works in a low temperature environment below 10K, and has broad application prospects in civil, military and aerospace fields. There are mainly the following two fabrication techniques for blocking impurity band detectors. One of them is to epitaxially grow a heavily doped silicon absorber layer on a high-conductivity silicon substrate, and epitaxially grow a high-resistance silicon barrier layer on the absorber layer in the same furnace. The advantage of this preparation method is that the structure and process are relatively simple, and it is easy to increase The disadvantage is that the epitaxially grown high-resistance silicon barr...

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Problems solved by technology

One of them is to epitaxially grow a heavily doped silicon absorber layer on a high-conductivity silicon substrate, and epitaxially grow a high-resistance silicon barrier layer on the absorber layer in the same furnace. The advantage of this preparation method is that the structure and process are relatively simple, and it is easy to increase The disadvantage is that the epitaxially grown high-resistance silicon barrier layer will inevitably introduce impurities, which reduces the resistivity and cannot effectively suppress the dark current; another method is to use ion implantation on the high-resistance silicon substrate. The advantage of this method is that the high-resistance silicon substrate is used as the barrier layer to increase the resistivity of the barrier layer and effectively suppress the dark current. The disadvantage is that the thickness of the absorber layer formed by ion implantation is limited. Below 2 microns, this limits the quantum efficiency and responsivity of the device

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