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Method preparing high on/off ratio TaOx resistive random access memory (RRAM)

A random access memory, high switching ratio technology, applied in the direction of electrical components, etc., can solve the problems of device resistance degradation, leakage current increase, permanent breakdown, etc., to achieve small leakage current, high switching ratio, and improved resistance change performance Effect

Inactive Publication Date: 2018-08-07
XI AN JIAOTONG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] TaOx has good comprehensive performance as a resistive dielectric layer, but TaOx belongs to transition metal oxides, and it is easy to generate non-stoichiometric oxides during the deposition process, resulting in the decline of the resistance of the device, the increase of the leakage current, and the decrease of the on-off ratio. Further may lead to permanent breakdown in resistive switching process

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0019] (1) Select P-type silicon as the substrate, and perform cleaning and drying in sequence.

[0020] The resistivity of P-type silicon is about 0.004Ω·cm-0.005Ω·cm, and there is an oxide layer with a thickness of 2±0.5nm on it. The cleaning treatment is performed by ultrasonic oscillation in acetone, absolute ethanol, and deionized water for 15 minutes, and dried. processing in N 2 under atmosphere.

[0021] (2) Put the cleaned substrate into the vacuum chamber and evacuate until the background vacuum is 4.0×10 -4 Pa, using DC reactive sputtering magnetron technology, with Ta (purity 99.99%) as the sputtering target, Ar (purity 99.999%) and O 2 (purity 99.999%) is the working gas (O 2 content of 50%) to prepare the TaOx resistive layer.

[0022] (3) The power of the Ta target during the sputtering process was 150W, the substrate temperature was 25°C, the working pressure was 0.5Pa, a negative bias voltage of -70V was applied during the sputtering process, and the sputt...

Embodiment 2

[0027] (1) Select P-type silicon as the substrate, and perform cleaning and drying in sequence.

[0028] The resistivity of P-type silicon is about 0.004Ω·cm-0.005Ω·cm, and there is an oxide layer with a thickness of 2±0.5nm on it. The cleaning treatment is performed by ultrasonic oscillation in acetone, absolute ethanol, and deionized water for 15 minutes, and dried. processing in N 2 under atmosphere.

[0029] (2) Put the cleaned substrate into the vacuum chamber and evacuate until the background vacuum is 4.0×10 -4 Pa, using DC reactive sputtering magnetron technology, with Ta (purity 99.99%) as the sputtering target, Ar (purity 99.999%) and O 2 (purity 99.999%) is the working gas (O 2 The content is 50%) to prepare the TaOx resistance switch layer.

[0030] (3) The power of the Ta target during the sputtering process was 150W, the substrate temperature was 25°C, the working pressure was 0.5Pa, a negative bias voltage of -70V was applied during the sputtering process, a...

Embodiment 3

[0035] (1) Select P-type silicon as the substrate, and perform cleaning and drying in sequence.

[0036] The resistivity of P-type silicon is about 0.004Ω·cm-0.005Ω·cm, and there is an oxide layer with a thickness of 2±0.5nm on it. The cleaning treatment is performed by ultrasonic oscillation in acetone, absolute ethanol, and deionized water for 15 minutes, and dried. processing in N 2 under atmosphere.

[0037] (2) Put the cleaned substrate into the vacuum chamber and evacuate until the background vacuum is 4.0×10 -4 Pa, using DC reactive sputtering magnetron technology, with Ta (purity 99.99%) as the sputtering target, Ar (purity 99.999%) and O 2 (purity 99.999%) is the working gas (O 2 The content is 50%) to prepare the TaOx resistance switch layer.

[0038] (3) The power of the Ta target during the sputtering process was 150W, the substrate temperature was 25°C, the working pressure was 0.5Pa, a negative bias voltage of -70V was applied during the sputtering process, a...

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Abstract

The invention discloses a method preparing a high on / off ratio TaOx resistive random access memory (RRAM); the method comprises the following steps: 1, selecting a low-resistance P-type silicon as a substrate, and cleaning and drying the substrate; 2, using a DC reaction magnetron sputtering method to deposit a TaOx resistive change layer on the substrate formed in step1; 3, using the magnetron sputtering method to deposit an Ag electrode on the obtained TaOx resistive change layer, thus obtaining a memory matrix; 4, annealing the memory matrix obtained in step3 so as to improve the TaOx resistive change layer oxygen content and improve the crystallization degrees, thus obtaining the high on / off ratio TaOx resistive random access memory (RRAM). The method combines the DC reaction magnetronsputtering method with the oxygen annealing mode to obtain the TaOx resistive change layer; when a bias test is applied, the method can greatly reduce the RRAM electric leakage current, can greatly improve the on / off ratio, can prevent permanence breakdown, and can increase circulation cycles.

Description

technical field [0001] The invention belongs to the field of semiconductor resistive random access memory, and in particular relates to a method for preparing a TaOx resistive random access memory with a high switching ratio, aiming at improving the resistive performance of TaOx materials, reducing leakage current, and significantly increasing the switching ratio. Background technique [0002] As semiconductor technology nodes continue to advance, conventional non-volatile memory has reached its size limit. Due to its simple structure, fast erasing and writing speed, low energy consumption, and promising miniaturization prospects, RRAM has become a type of memory that has been widely concerned by academia and industry in the past decade. As a semiconductor resistive random access memory, there are four basic requirements: first, the read / write voltage is as small as possible, generally controlled within 3V; second, 3. ROFF / RON generally requires at least 10 or more to simpli...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L45/00
CPCH10N70/026H10N70/041H10N70/011
Inventor 王伟高磊雯贺洋
Owner XI AN JIAOTONG UNIV
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