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Method for manufacturing composite gate IGBT (Insulated Gate Bipolar Transistor) chip with three-dimensional channel

A manufacturing method and compound gate technology, which are applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem of not improving the current density and withstand voltage capability of the chip, and achieve the goal of improving the current density of the chip, increasing the channel density, Effect of increasing gate oxide thickness

Active Publication Date: 2018-11-06
ZHUZHOU CRRC TIMES SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is that the insulated gate bipolar transistor chip made by the prior art cannot ensure a large withstand voltage capability and a wide safe working area while greatly increasing the current density of the chip

Method used

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  • Method for manufacturing composite gate IGBT (Insulated Gate Bipolar Transistor) chip with three-dimensional channel
  • Method for manufacturing composite gate IGBT (Insulated Gate Bipolar Transistor) chip with three-dimensional channel
  • Method for manufacturing composite gate IGBT (Insulated Gate Bipolar Transistor) chip with three-dimensional channel

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Embodiment 1

[0043] In order to solve the above-mentioned technical problems existing in the prior art, an embodiment of the present invention provides a method for manufacturing a composite gate IGBT chip with a three-dimensional channel.

[0044] figure 1 A schematic flow diagram showing a method for fabricating the upper surface structure of a composite gate IGBT chip with a three-dimensional channel in Embodiment 1 of the present invention; image 3 It shows a schematic diagram of the manufacturing method of the composite gate IGBT chip with a three-dimensional channel in Embodiment 1 of the present invention.

[0045] refer to figure 1 with image 3 In this embodiment, the method for fabricating a composite gate IGBT chip with a three-dimensional channel includes the following steps.

[0046] Step S101 , forming a first oxide layer 1 on the upper surface of the wafer substrate 2 .

[0047] Preferably, the wafer substrate 2 may be a silicon wafer, and the first oxide layer 1 is sil...

Embodiment 2

[0083] In order to solve the above-mentioned technical problems existing in the prior art, the embodiment of the present invention also provides another method for manufacturing a composite gate IGBT chip with a three-dimensional channel.

[0084] Figure 5 A schematic structural diagram of a compound gate IGBT chip with a three-dimensional channel manufactured by the method for manufacturing a compound gate IGBT chip with a three-dimensional channel in Embodiment 2 of the present invention is shown.

[0085] The embodiment method adds step 1021 between step S102 and step S103 on the basis of embodiment one, specifically as follows:

[0086] Step 1021 , implanting N-type impurities into the second predetermined position of the exposed wafer substrate 2 , and diffusing them to a third junction depth to form an N well 15 , the third junction depth being greater than the first junction depth.

[0087] At this point, step 103 should be: implanting P-type impurities into the N wel...

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Abstract

The invention discloses a method for manufacturing a composite gate IGBT (Insulated Gate Bipolar Transistor) chip with a three-dimensional channel, which comprises the steps of forming a first oxide layer on the upper surface of a wafer substrate; etching a first preset position on the first oxide layer so as to expose the wafer substrate below; injecting a P-type impurity into a second preset position of the exposed wafer substrate, and enabling the P-type impurity to be diffused by a first junction depth to form a P-well; etching a third preset position on the P-well to form a groove, wherein the depth of the groove is greater than the depth of the P-well; forming a second oxide layer on the inner surface of the groove and the upper surface of the exposed wafer substrate; forming a polycrystalline silicon layer in the groove and on the first oxide layer and the second oxide layer, wherein the polycrystalline silicon in the groove fills the groove; and etching a fourth preset positionon the polycrystalline silicon layer to expose a groove opening of the groove and the second oxide layer above part of the P-well. The IGBT chip manufactured according to the manufacturing method notonly has good voltage resistance, but also increases the channel density, thereby greatly improving the current density of the chip.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to a method for manufacturing a composite gate IGBT chip with a three-dimensional channel. Background technique [0002] Insulated gate bipolar transistor (IGBT) is a compound fully controlled voltage-driven power semiconductor device composed of bipolar transistor (BJT) and insulated gate field effect transistor (MOSFET). Due to its on-state voltage drop, the current With the characteristics of high density, high input impedance and fast response, it is widely used in rail transit, smart grid, industrial frequency conversion and new energy development and other fields. [0003] The gates of existing insulated gate bipolar transistors (IGBTs) are usually planar gates or trench gates. When the gate of the insulated gate bipolar transistor (IGBT) is a planar gate, the manufacturing process of the insulated gate bipolar transistor (IGBT) is simple, the requirements for p...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/331H01L29/423
CPCH01L29/42312H01L29/4236H01L29/66325
Inventor 刘国友朱春林朱利恒
Owner ZHUZHOU CRRC TIMES SEMICON CO LTD