Preparation method of zinc nitride composite thin film with improved properties

Abstract

The invention provides a preparing method of a zinc nitride series composite thin film with the improved property. The method comprises the following steps that a single crystal silicon substrate withthe clean surface is prepared; a first ZnO layer is deposited on the surface of the single crystal silicon substrate; a metal Zn layer is deposited on the surface of the first ZnO layer; a second ZnOlayer is deposited on the surface of the metal Zn layer; a first AZO layer is deposited on the surface of the second ZnO layer, a second AZO layer is deposited on the surface of the first AZO layer,a first Zn3N2 layer is deposited on the surface of the second AZO layer; a second Zn3N2 layer is deposited on the surface of the first Zn3N2 layer; and the composite thin film is annealed. The composite thin film prepared through the preparing method of the zinc nitride series composite thin film has the special film structure, compared with a thin film in the prior art, the thin film has the higher migration rate and the carrier concentration, if the film layer is used for making a device, the power consumption of the device is reduced by more than 20%, and the use frequency is at least improved by 10%.

Description

Technical field [0001] The invention belongs to the technical field of layered materials and relates to a method for preparing a zinc nitride composite film with improved performance. Background technique [0002] In the development process of the microelectronics industry, there is a Moore's Law proposed by Mr. Gordon Moore, one of the founders of Intel Corporation. The specific content is: at a certain cost, the number of components that can be accommodated on an integrated circuit , It will double every 18-24 months, and the performance will also double. Under the prophecy of this law, the scale of integrated circuits continues to increase, and its integration level is also rising substantially. So the same is true for devices with MOS (metal oxide semiconductor) transistor structure. In the course of development in recent decades, CMOS structure integrated circuits have become the core technology in the entire semiconductor industry. Its channel length has changed from The ...

AI Technical Summary

Problems solved by technology

When the size of 45 nanometers is required, the equivalent oxide layer thickness of the gate electrode is required to be less than 3 nanometers, which means that the thickness of the traditional silicon oxide gate dielectric material with excellent performance will be reduced to about 1 nanometer. For silicon oxide materials, there will be obvious quantum tunneling effect, resulting in greatly increased leakage current, that is, reaching its physical limit

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