A bipolar device with a high Erli voltage and a manufacturing method thereof are disclosed

Abstract

The invention discloses a bipolar device with high Erli voltage and a manufacturing method thereof. The bipolar device comprises three metal wires and a substrate. An N buried layer, a first epitaxiallayer, a second epitaxial layer and a SiO2 layer are sequentially arranged above the substrate; After the three metal wires pass through the lead-out holes arranged on the SiO2 layer, the lead-out region, the emitting region and the P-type base region of the current collector region are connected respectively. The lead-out region and P-type base region of the collector region are located in the second epitaxial layer, and the emitter region is located in the P-type base region. P-type isolation regions are arranged on both sides of the bipolar device. A main improvement of that method is thata first epitaxial process is carried out on the substrate to form a first epitaxial lay; Performing a second epitaxial process on the first epitaxial layer to form a second epitaxial layer; Through the design of double epitaxial layers, the Erli voltage can be increased effectively, the Erli effect can be reduced, and the precision of integrated circuit can be improved. At the same time, the threshold voltage of the parasitic PMOS transistor is increased, the metal wiring of the circuit is more convenient, and the working voltage range is enlarged.

Description

technical field [0001] The invention belongs to the field of performance improvement of semiconductor devices, and relates to a high Early voltage bipolar device and a manufacturing method thereof. Background technique [0002] NPN transistor is a transistor structure often used in bipolar integrated circuits. In the production of traditional bipolar integrated circuits, an N-type epitaxial layer with desired resistivity and thickness is deposited on a P-type substrate, and is formed by ion implantation or diffusion process. The P-type impurity-doped base region, on the base region and the epitaxial layer, ion implantation or diffusion process is used to form the N-type impurity-doped emitter region and the lead-out region of the collector region, that is, the N-type epitaxial layer is selectively The P-type impurity doping forms the base region, and then selectively N-type impurity doping is performed on the P-type base region to form the emitter region, and at the same tim...

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Problems solved by technology

[0003] Traditional NPN transistors have low Early voltage and significant Early effect, which affect the accuracy of the circuit in integrated circuits with high demand. For example, when used as a reference source, the output fluctuation of the reference source increases due to the influence of the Early effect.

For NPN transistor circuits with high operating voltage, due to the low impurity concentration on the surface of the epitaxial layer, the parasitic PMOS threshold voltage is low, which affects the metal wiring of the circuit and the lower limit of the operating voltage

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