GaN MISFET device with high-quality gate interface and preparation method thereof

A high-quality, interface technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as high interface state density and gate dielectric layer defects, poor gate dielectric layer quality, and device stability issues. Achieve high dielectric layer quality and interface quality, high repeatability and reliability, and reduced channel resistance

Pending Publication Date: 2019-05-14
SUN YAT SEN UNIV
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the MIS gate of GaN-based devices usually has a high density of interface states, dielectric layer defects, etc., which cause stability problems in device operation.
The quality of the GaN MIS interface obtained by the current preparation method is generally poor. In the actual process, there are the following problems or deficiencies: 1. Compared with Si-based devices, high-quality Si / SiO can be prepared by thermal oxidation method 2 MOS interface structure, GaN does not have a good intrinsic oxide to form an excellent MOS interface. When GaN is exposed to the atmosphere, the surface will absorb oxygen atoms to form a natural oxide (Ga-O), increasing the dielectric and (Al)GaN The interface state density of the interface will deteriorate the quality of the MIS interface and affect the reliability of the device (S. Yang, Z. Tang et al., IEEE Electron Device Lett., vol. 34, no. 12, pp. 1497-1499, Dec. 2013); 2. Currently commonly used methods for preparing gate dielectrics, such as ALD, PECVD, LPCVD and other methods, due to the relatively low growth temperature (generally lower than 800°C), the quality of the grown gate dielectric layer is poor (Anushree Tomer et al., IEEE 2016 3rd International Conference on Emerging Electronics (ICEE), 27-30 Dec. 2016), and the corresponding post-annealing conditions are very harsh, which will increase additional costs
These problems lead to high interface state density and gate dielectric layer defects in the MIS interface system, thereby deteriorating device characteristics and affecting the stability of device operation

Method used

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  • GaN MISFET device with high-quality gate interface and preparation method thereof
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  • GaN MISFET device with high-quality gate interface and preparation method thereof

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Embodiment 2

[0052] Such as Figure 10 Shown is a schematic diagram of the device structure of this embodiment, which differs from the structure of Embodiment 1 only in that in Embodiment 1, an insulating second gate dielectric layer 6 is covered on the groove of the gate 9 that retains the mask layer 4 , while in embodiment 2 there is no second gate dielectric layer 6 on the mask layer 4, and the metal is directly vapor-deposited as the gate 9 metal.

Embodiment 3

[0054] Such as Figure 11 Shown is a schematic diagram of the device structure of this embodiment, which differs from the structure of Embodiment 1 only in that the GaN / AlGaN heterostructure in Embodiment 1 is formed by secondary epitaxy and at the same time the gate 9 groove region is naturally formed, while in Embodiment 1 In 3, the secondary epitaxial structure is only AlGaN, and the groove area of ​​the gate 9 is formed at the same time, and the number 11 is the AlGaN structure layer 11 .

Embodiment 4

[0056] Such as Figure 12 Shown is a schematic diagram of the device structure of this embodiment, which differs from the structure of Embodiment 1 only in that: in Embodiment 1, the GaN / AlGaN heterostructure is double epitaxial and forms the gate 9 groove region, while in Embodiment 4 the two An AlN space isolation layer 12 with a thickness of 0.3-5 nm is inserted between the AlGaN barrier layer and the GaN layer of the sub-epitaxial structure, and the groove area of ​​the gate 9 is formed at the same time.

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Abstract

The invention relates to a GaN MISFET device with a high-quality gate interface and a preparation method thereof. The device comprises a substrate, and an epitaxial layer, a gate dielectric layer, a source, a drain and a gate which grown on the substrate. The epitaxial layer comprises a stress buffer layer and a GaN epitaxial layer which are grown in a primary epitaxial mode; a secondary epitaxiallayer is grown on a reselection area thereon, and a groove channel is formed; a high-quality SiO2 mask layer subjected to high-temperature annealing in the secondary epitaxy is retained as a first gate dielectric layer, and a second gate dielectric layer is grown on the mask layer. Gate metal covers the gate dielectric layer of the groove channel, and two ends of the gate are covered with metal to form the source and the drain. Compared with an existing method, in which the SiO2 mask layer is removed and then a gate dielectric layer is deposited; the device structure and the preparation process of the invention are simpler and more reliable, and the quality of the gate dielectric layer and the dielectric layer / GaN interface are better optimized, so that the performance of the GaN MISFET device is improved, and particularly, it is very critical to improvement of the problems in reduction of the channel resistance, the gate electric leakage, the threshold voltage stability and the like.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a GaN MISFET device with a high-quality gate interface and a preparation method thereof. Background technique [0002] Because of its superior electrical and material properties such as large band gap, high breakdown electric field strength, high saturated electron drift velocity, high electron mobility, high operating temperature, corrosion resistance, and radiation resistance, GaN materials are widely used in high frequency and high voltage applications. The field of high-power, high-temperature, high-power electronic devices has great advantages and wide applications. GaN-based power switching devices usually use the two-dimensional electron gas with high concentration and high mobility generated by the polarization effect at the interface of the AlGaN / GaN heterostructure to work, so that the device has a lower on-resistance and a higher operating frequency. It can ful...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/423H01L29/51H01L29/06H01L21/336H01L29/78H01L21/28
Inventor 刘扬吴千树何亮
Owner SUN YAT SEN UNIV
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