GaN MISFET device with high-quality gate interface and preparation method thereof
A high-quality, interface technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as high interface state density and gate dielectric layer defects, poor gate dielectric layer quality, and device stability issues. Achieve high dielectric layer quality and interface quality, high repeatability and reliability, and reduced channel resistance
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Embodiment 2
[0052] Such as Figure 10 Shown is a schematic diagram of the device structure of this embodiment, which differs from the structure of Embodiment 1 only in that in Embodiment 1, an insulating second gate dielectric layer 6 is covered on the groove of the gate 9 that retains the mask layer 4 , while in embodiment 2 there is no second gate dielectric layer 6 on the mask layer 4, and the metal is directly vapor-deposited as the gate 9 metal.
Embodiment 3
[0054] Such as Figure 11 Shown is a schematic diagram of the device structure of this embodiment, which differs from the structure of Embodiment 1 only in that the GaN / AlGaN heterostructure in Embodiment 1 is formed by secondary epitaxy and at the same time the gate 9 groove region is naturally formed, while in Embodiment 1 In 3, the secondary epitaxial structure is only AlGaN, and the groove area of the gate 9 is formed at the same time, and the number 11 is the AlGaN structure layer 11 .
Embodiment 4
[0056] Such as Figure 12 Shown is a schematic diagram of the device structure of this embodiment, which differs from the structure of Embodiment 1 only in that: in Embodiment 1, the GaN / AlGaN heterostructure is double epitaxial and forms the gate 9 groove region, while in Embodiment 4 the two An AlN space isolation layer 12 with a thickness of 0.3-5 nm is inserted between the AlGaN barrier layer and the GaN layer of the sub-epitaxial structure, and the groove area of the gate 9 is formed at the same time.
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