High-open-voltage diffusion high-sheet-resistance process of PERC superposition SE

A high square resistance and process technology, applied in sustainable manufacturing/processing, electrical components, climate sustainability, etc., can solve the problem of low minority carrier lifetime, poor efficiency consistency between PERC+LDSE cells, unreasonable PN junction structure, etc. question

Active Publication Date: 2020-07-07
HENGDIAN GRP DMEGC MAGNETICS CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The invention mainly solves the problems of poor efficiency consistency between PERC+LDSE cells, unreasonable PN junction structure and low minority carrier lifetime in the existing technology; it provides a high opening pressure diffusion and high square resistance process of PERC superimposed SE, which is conducive to the preparation of high PERC+LDSE cell with square resistance, high junction depth, low surface phosphorus concentration and PN junction with high phosphorus concentration in PSG

Method used

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  • High-open-voltage diffusion high-sheet-resistance process of PERC superposition SE
  • High-open-voltage diffusion high-sheet-resistance process of PERC superposition SE
  • High-open-voltage diffusion high-sheet-resistance process of PERC superposition SE

Examples

Experimental program
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Effect test

Embodiment 1

[0039] A PERC superimposed SE process with high opening pressure diffusion and high square resistance, such as figure 1 and figure 2 shown, including

[0040] Step S1: Entering the boat: After cleaning and texturing the P-type original silicon wafer 1, put it into the quartz boat and push it into the furnace tube of the diffusion furnace;

[0041] Step S2: Vacuum side leakage: Vacuumize the diffusion furnace to 100mbar, feed nitrogen at 7000sccm for 350s, exhaust the exhaust gas in the furnace tube, and raise the temperature of the diffusion furnace to 550°C;

[0042] Step S3: Heating up and low-concentration pre-oxidation: Raise the temperature of the diffusion furnace to 680°C, inject 500 sccm of oxygen and 1000 sccm of high nitrogen, and pre-oxidize the silicon wafer for 300 s to accelerate the discharge of exhaust gas in the furnace tube;

[0043] Step S4: Constant-temperature high-concentration pre-oxidation: The temperature of the diffusion furnace is raised and contr...

Embodiment 2

[0054] A PERC superimposed SE process with high opening pressure diffusion and high square resistance, such as figure 1 and figure 2 shown, including

[0055] Step S1: Entering the boat: After cleaning and texturing the P-type original silicon wafer 1, put it into the quartz boat and push it into the furnace tube of the diffusion furnace;

[0056] Step S2: Vacuumize side leakage: Vacuumize the diffusion furnace to 100mbar, feed nitrogen at 8000sccm for 400s, exhaust the exhaust gas in the furnace tube, and raise the temperature of the diffusion furnace to 600°C at the same time;

[0057] Step S3: Heating up and low-concentration pre-oxidation: Raise the temperature of the diffusion furnace to 720°C, inject 750 sccm of oxygen and 1500 sccm of nitrogen, and perform pre-oxidation on the silicon wafer for 350 s to accelerate the discharge of exhaust gas in the furnace tube;

[0058] Step S4: Constant-temperature high-concentration pre-oxidation: The temperature of the diffusion...

Embodiment 3

[0069] A PERC superimposed SE process with high opening pressure diffusion and high square resistance, such as figure 1 and figure 2 shown, including

[0070] Step S1: Entering the boat: After cleaning and texturing the P-type original silicon wafer 1, put it into the quartz boat and push it into the furnace tube of the diffusion furnace;

[0071] Step S2: Vacuum side leakage: Vacuumize the diffusion furnace to 100mbar, feed nitrogen at 10,000sccm for 450s, exhaust the exhaust gas in the furnace tube, and raise the temperature of the diffusion furnace to 700°C at the same time;

[0072] Step S3: Heating and low-concentration pre-oxidation: raise the temperature of the diffusion furnace to 780°C, inject 1000 sccm of oxygen and 2000 sccm of large nitrogen, and perform a low-concentration pre-oxidation on the silicon wafer for 400 seconds to accelerate the discharge of exhaust gas in the furnace tube;

[0073] Step S4: Pre-oxidation at constant temperature and high concentrati...

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Abstract

The invention discloses a high-open-voltage diffusion high-sheet-resistance process of PERC superposition SE. The process comprises the following steps: S1, entering a boat; S2, vacuumizing and side leakage are conducted; S3, raising the temperature and carrying out low-concentration pre-oxidation; S4, carrying out constant-temperature high-concentration pre-oxidation; S5, carrying out low-temperature high-concentration oxygen deposition; S6, heating to deposit high-concentration oxygen; S7, raising the temperature and propelling; S8, propelling at constant temperature; and S9, cooling and discharging from the boat. Before the high-temperature propulsion is performed, the high concentration oxygen atmosphere is adopted, the thick oxide layer is used as a buffer medium layer, an actually deposited phosphorus source is controlled, the uniformity of phosphorus source deposition of the silicon wafer is facilitated, high-temperature propulsion is carried out in an oxygen-free atmosphere fora long time, the fact that a PN junction is high and deep is ensured, and two-step deposition is adopted for PN junction high junction depth and silicon wafer surface deposition; and, under the high-concentration oxygen flow atmosphere, the actual deposition source amount is controlled, the surface dead layer is reduced, the minority carrier lifetime is prolonged, long-time cooling is carried outunder the oxygen-free atmosphere, and then the low surface phosphorus concentration is guaranteed, and Uoc and Isc are guaranteed.

Description

technical field [0001] The invention relates to the technical field of monocrystalline silicon solar cells, in particular to a PERC superimposed SE high-opening-voltage diffusion high-square-resistance process. Background technique [0002] The cost reduction brought about by the iteration of crystalline silicon solar cell technology has gradually become the main driving force for the development of the industry. In the past two years, the photovoltaic industry cell technology has undergone a transformation from conventional BSF cells → PERC cells → PERC+LDSE cells, of which PERC+LDSE cells The process flow is: texturing→diffusionlaser SE→etching→back passivation→front PECVD→back PECVD→laser slotting→screen printingsintering→testing. Only one laser SE process is added before the process, and the rest of the process remains unchanged. [0003] The laser SE process uses the phosphosilicate glass layer produced by the diffusion process as the dopant source, and uses the ther...

Claims

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Application Information

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IPC IPC(8): H01L31/18H01L21/67
CPCH01L21/67248H01L21/67253H01L31/1804Y02P70/50
Inventor 张逸凡王英杰赵壮李文龙金杭韦祖路
Owner HENGDIAN GRP DMEGC MAGNETICS CO LTD
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