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A perc superimposed se process with high opening pressure diffusion and high square resistance

A high square resistance and process technology, applied in the field of monocrystalline silicon solar cells, can solve the problems of low minority carrier lifetime, unreasonable PN junction structure, poor efficiency consistency between PERC+LDSE cells, etc., to achieve low surface phosphorus concentration, reduce Dead layer on the surface, the effect of improving the lifespan of minority carriers

Active Publication Date: 2021-10-22
HENGDIAN GRP DMEGC MAGNETICS CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The invention mainly solves the problems of poor efficiency consistency between PERC+LDSE cells, unreasonable PN junction structure and low minority carrier lifetime in the existing technology; it provides a high opening pressure diffusion and high square resistance process of PERC superimposed SE, which is conducive to the preparation of high PERC+LDSE cell with square resistance, high junction depth, low surface phosphorus concentration and PN junction with high phosphorus concentration in PSG

Method used

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  • A perc superimposed se process with high opening pressure diffusion and high square resistance
  • A perc superimposed se process with high opening pressure diffusion and high square resistance
  • A perc superimposed se process with high opening pressure diffusion and high square resistance

Examples

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Effect test

Embodiment 1

[0039] A PERC superimposed SE process with high opening pressure diffusion and high square resistance, such as figure 1 and figure 2 shown, including

[0040] Step S1: Entering the boat: After cleaning and texturing the P-type original silicon wafer 1, put it into the quartz boat and push it into the furnace tube of the diffusion furnace;

[0041] Step S2: Vacuum side leakage: Vacuumize the diffusion furnace to 100mbar, feed nitrogen at 7000sccm for 350s, exhaust the exhaust gas in the furnace tube, and raise the temperature of the diffusion furnace to 550°C;

[0042] Step S3: Heating up and low-concentration pre-oxidation: Raise the temperature of the diffusion furnace to 680°C, inject 500 sccm of oxygen and 1000 sccm of high nitrogen, and pre-oxidize the silicon wafer for 300 s to accelerate the discharge of exhaust gas in the furnace tube;

[0043] Step S4: Constant-temperature high-concentration pre-oxidation: The temperature of the diffusion furnace is raised and contr...

Embodiment 2

[0054] A PERC superimposed SE process with high opening pressure diffusion and high square resistance, such as figure 1 and figure 2 shown, including

[0055] Step S1: Entering the boat: After cleaning and texturing the P-type original silicon wafer 1, put it into the quartz boat and push it into the furnace tube of the diffusion furnace;

[0056] Step S2: Vacuumize side leakage: Vacuumize the diffusion furnace to 100mbar, feed nitrogen at 8000sccm for 400s, exhaust the exhaust gas in the furnace tube, and raise the temperature of the diffusion furnace to 600°C at the same time;

[0057] Step S3: Heating up and low-concentration pre-oxidation: Raise the temperature of the diffusion furnace to 720°C, inject 750 sccm of oxygen and 1500 sccm of nitrogen, and perform pre-oxidation on the silicon wafer for 350 s to accelerate the discharge of exhaust gas in the furnace tube;

[0058] Step S4: Constant-temperature high-concentration pre-oxidation: The temperature of the diffusion...

Embodiment 3

[0069] A PERC superimposed SE process with high opening pressure diffusion and high square resistance, such as figure 1 and figure 2 shown, including

[0070] Step S1: Entering the boat: After cleaning and texturing the P-type original silicon wafer 1, put it into the quartz boat and push it into the furnace tube of the diffusion furnace;

[0071] Step S2: Vacuum side leakage: Vacuumize the diffusion furnace to 100mbar, feed nitrogen at 10,000sccm for 450s, exhaust the exhaust gas in the furnace tube, and raise the temperature of the diffusion furnace to 700°C at the same time;

[0072] Step S3: Heating and low-concentration pre-oxidation: raise the temperature of the diffusion furnace to 780°C, inject 1000 sccm of oxygen and 2000 sccm of large nitrogen, and perform a low-concentration pre-oxidation on the silicon wafer for 400 seconds to accelerate the discharge of exhaust gas in the furnace tube;

[0073] Step S4: Pre-oxidation at constant temperature and high concentrati...

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Abstract

The invention discloses a PERC superimposed SE high opening pressure diffusion high square resistance process, comprising the following steps: step S1: step S1: enter the boat; step S2: vacuumize the side leakage; step S3: raise the temperature and pre-oxidize with low concentration; S4: constant temperature high concentration pre-oxidation; step S5: low temperature high concentration oxygen deposition; step S6: temperature rise high concentration oxygen deposition; step S7: temperature rise advance; step S8: constant temperature advance; step S9: cooling out of the boat. The present invention adopts a high-concentration oxygen atmosphere and a thick oxide layer as a buffer medium layer before high-temperature advancement to control the actual deposited phosphorus source, which is beneficial to the uniformity of phosphorus source deposition on silicon wafers. High-temperature advancement is carried out in a long-term, oxygen-free atmosphere , to ensure the high junction depth of the PN junction, two-step deposition is used for the surface deposition of silicon wafers, all in a high-concentration oxygen flow atmosphere, the actual deposition source is controlled, the surface dead layer is reduced, and the minority carrier lifetime is improved, and the oxygen-free atmosphere is used for a long time Lower the temperature to ensure a lower surface phosphorus concentration and ensure Uoc and Isc.

Description

technical field [0001] The invention relates to the technical field of monocrystalline silicon solar cells, in particular to a PERC superimposed SE high-opening-voltage diffusion high-square-resistance process. Background technique [0002] The cost reduction brought about by the iteration of crystalline silicon solar cell technology has gradually become the main driving force for the development of the industry. In the past two years, the photovoltaic industry cell technology has undergone a transformation from conventional BSF cells → PERC cells → PERC+LDSE cells, of which PERC+LDSE cells The process flow is: texturing→diffusion→laser SE→etching→back passivation→front PECVD→back PECVD→laser slotting→screen printing→sintering→testing. Only one laser SE process is added before the process, and the rest of the process remains unchanged. [0003] The laser SE process uses the phosphosilicate glass layer produced by the diffusion process as the dopant source, and uses the ther...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L31/18H01L21/67
CPCH01L21/67248H01L21/67253H01L31/1804Y02P70/50
Inventor 张逸凡王英杰赵壮李文龙金杭韦祖路
Owner HENGDIAN GRP DMEGC MAGNETICS CO LTD
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