Noise shaping successive approximation analog-to-digital converter and noise shaping method

Abstract

The invention provides a noise shaping successive approximation analog-to-digital converter and a noise shaping method. The noise shaping successive approximation analog-to-digital converter comprises a first gate voltage bootstrap sampling switch, a second gate voltage bootstrap sampling switch, a VCO comparator, an SAR digital logic circuit, a first charge redistribution type capacitor array, a second charge redistribution type capacitor array, a passive loop filter and a fully differential dynamic amplifier. According to the noise shaping successive approximation analog-to-digital converter provided by the invention, a second-order noise shaping effect can be realized, and in-band noise of a signal can be effectively suppressed, so that the signal-to-noise distortion ratio and the spurious-free dynamic range of the analog-to-digital converter are remarkably improved.

Description

technical field [0001] The disclosure relates to the field of successive approximation analog-to-digital converters, in particular to a noise-shaping successive-approximation analog-to-digital converter and a noise shaping method. Background technique [0002] Noise-Shaping Successive Approximation Register Analog-to-Digital Conversion (NS-SAR ADC for short) introduces oversampling technology and noise shaping technology into SAR ADC. hotspots. The ADC with this hybrid architecture only needs to slightly modify the structure of the traditional SAR ADC to shape the in-band noise, thereby greatly improving the accuracy of the analog-to-digital converter on the basis of the low power consumption of the SAR structure. NS-SAR mainly has two structures: Cascaded Integrator Feed-forward (CIFF) and Error Feedback (EF). In the circuit structure of the former, FIR and IIR filters are usually cascaded, and the circuit is more complicated, and it is difficult to achieve low power cons...

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Problems solved by technology

The continuous decline of supply voltage has brought many problems to the design of traditional structure analog circuits, such as the decrease of input and output voltage swing, the deterioration of linearity, and the decrease of the voltage corresponding to the least significant bit (Least Significant Bit, LSB) when the number of bits is the same. and other problems; at the same time, in order to make the comparator work under low voltage, a simple circuit structure is usually used, which will limit the comparison accuracy and speed of the comparator, making it very difficult to directly complete the quantization of the analog input voltage, which undoubtedly increases The difficulty of ADC design

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