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Method for realizing enhanced HEMT through p-type passivation

An enhanced and p-type technology, applied in the field of microelectronics technology, can solve the problems of small saturation current, reduced device performance, poor repeatability, etc.

Pending Publication Date: 2021-09-10
SUZHOU NENGWU ELECTRONICS TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The concave gate structure solves the problem of small saturation current, but the barrier layer in the general HEMT device is only 20-30nm, and the process of forming the concave gate structure by etching process is difficult to control and the repeatability is poor
For another example, F plasma treatment can also realize enhanced HEMT devices, and does not require etching, but F plasma will also etch the barrier layer during the implantation process, resulting in a decrease in device performance
The p-type cap layer also requires an etching process, which is difficult to control and has poor repeatability. At the same time, an interface state is generated, which affects the stability of the device.

Method used

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  • Method for realizing enhanced HEMT through p-type passivation
  • Method for realizing enhanced HEMT through p-type passivation
  • Method for realizing enhanced HEMT through p-type passivation

Examples

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Effect test

Embodiment 1

[0073] Example 1: Please refer to Figure 4 A method for fabricating an enhanced HEMT by implanting H ions into a p-type doped layer according to this embodiment includes the following steps:

[0074] (1) Treat the substrate surface in the reaction chamber of the epitaxial growth equipment;

[0075] (2) Epitaxial growth of AlGaN / GaN epitaxial layer and p-GaN on the substrate, wherein the thickness of GaN is 1μm-3μm, the thickness of AlGaN is 14nm-30nm, and the molar content of Al element is 20%-30%, p -GaN thickness is 5-100nm, Mg doping concentration is 10 16 After being taken out from the chamber, it is cleaned with an organic solution and purged with high-purity nitrogen;

[0076] (3) Photolithographic development is carried out on the cleaned sample, the photoresist is AZ5214, the exposure time is 6.5s, the development time is 50s-60s, and the table is isolated, and ion implantation or plasma etching can be used;

[0077] (4) By photolithography, etch the source and dra...

Embodiment 2

[0081] see again Figure 4 A method of manufacturing an enhanced HEMT realized by implanting H ions into a P-type doped layer comprises the following steps:

[0082] (1) processing the substrate surface in the reaction chamber;

[0083] (2) Epitaxial growth of AlGaN / GaN epitaxial layer and p-GaN on the substrate, wherein the thickness of GaN is 1μm-3μm, the thickness of AlGaN is 14nm-30nm, and the molar content of Al element is 20%-30%, p -GaN thickness is 5-100nm, Mg doping concentration is 10 16 After being taken out from the chamber, it is cleaned with an organic solution and purged with high-purity nitrogen;

[0084] (3) Photolithographic development is carried out to the cleaned sample. The photoresist is AZ5214, the exposure time is 6.5s, and the development time is 50s-60s. Use the photoresist as a mask and use an ion implanter to implant H ions. H can effectively combine with Mg in the implanted region of the p-type doped layer, making it lose the p-type characteris...

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Abstract

The invention discloses a method for realizing an enhanced HEMT (High Electron Mobility Transistor) through p-type passivation, which comprises the following steps of: providing a heterostructure mainly consisting of a first semiconductor and a second semiconductor, distributing the second semiconductor on the first semiconductor and having a band gap wider than that of the first semiconductor, and forming two-dimensional electron gas in the heterostructure; forming a p-type doped third semiconductor on the second semiconductor; carrying out passivation treatment on other regions except the under-gate region in the third semiconductor, so that the p-type doped region only exists in the under-gate region, and the under-gate region is distributed right below the gate of the HEMT device; and manufacturing a source electrode, a drain electrode and a grid electrode which are connected with the heterostructure, enabling the source electrode and the drain electrode to be electrically connected through the two-dimensional electron gas, and enabling the grid electrode to be distributed between the source electrode and the drain electrode. The invention also discloses an enhanced HEMT (high electron mobility transistor). The method has the advantages of simple process, high repeatability, stable and excellent device performance, low cost, easiness in large-scale production and the like.

Description

[0001] This application is a divisional application of a Chinese patent application submitted to the China Patent Office on June 08, 2016, with the application number 201610403535.2, and the title of the invention is "Method for realizing enhanced HEMT through p-type passivation and enhanced HEMT". technical field [0002] The invention relates to a method for realizing enhanced HEMT through p-type passivation, which belongs to the field of microelectronic technology. Background technique [0003] HEMT devices are made by making full use of the two-dimensional electron gas formed by the semiconductor heterostructure (Heterostructure) structure. Compared with III-VI (such as AlGaAs / GaAs HEMT), III-nitride semiconductors are due to piezoelectric polarization And the spontaneous polarization effect, a high-concentration two-dimensional electron gas can be formed in the heterostructure (such as AlGaN / GaN). Therefore, in HEMT devices made of group III nitrides, the barrier layer ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/335H01L29/06H01L29/778
CPCH01L29/0603H01L29/66462H01L29/7787
Inventor 宋亮郝荣晖付凯于国浩张晓东范亚明蔡勇张宝顺
Owner SUZHOU NENGWU ELECTRONICS TECH
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