Preparation process of silicon substrate on power insulator

Abstract

The invention relates to a preparation process of a silicon substrate on a power insulator. The preparation process comprises the following steps: preparing a silicon epitaxial wafer as a device layer silicon substrate and an oxidized silicon wafer as a supporting silicon substrate, performing plasma surface activation treatment, performing low-temperature annealing after normal-temperature bonding, and performing low-temperature annealing after adopting a mechanical grinding thinning mode, removing a silicon single crystal of the substrate by using two-step selective acid corrosion of fast corrosion and slow corrosion, carrying out CMP polishing treatment, then carrying out high-temperature oxidation thinning treatment, and finally removing silicon oxide grown by high-temperature oxidation through diluted hydrofluoric acid corrosion; enabling the low-temperature annealing temperature after bonding to not exceed 400 DEG C; and enabling the polishing removal amount of the bonding wafer to not exceed 1 micron and the temperature of high-temperature oxidation annealing to not lower than 900 DEG C, and finally, obtaining the required silicon-on-insulator substrate after a surface oxide layer is removed through a wet cleaning process. The thickness and the uniformity of the silicon substrate device layer on the power insulator are accurately controlled in a thinning mode of selective corrosion and CMP polishing and high-temperature thermal oxidation.

Description

technical field [0001] The invention relates to a method for preparing integrated circuit materials, in particular to a method for preparing a silicon substrate on a power insulator. Background technique [0002] Semiconductor devices based on silicon-on-insulator (SOI) substrates have attracted much attention because of their obvious advantages in power consumption, operating speed, radiation resistance and device integration. In recent years, with the continuous improvement of process technology, the preparation of SOI materials has been rapidly developed. According to the thickness of the top silicon layer, SOI materials can be divided into thin film SOI (top silicon is usually less than 1 μm) and thick film SOI (top silicon is usually greater than 1 μm). The corresponding SOI product applications can be divided into radio frequency SOI, power SOI, image SOI and MEMS micro-electromechanical SOI and other categories; the main driving force of the thin-film SOI market come...

AI Technical Summary

Problems solved by technology

However, due to the thinning process, it is difficult to precisely control the thickness uniformity of the top device silicon layer

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