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Method for remotely updating multi-version program of FPGA online

A multi-version and program technology, applied in the field of aviation integrated systems, can solve the problems of high time cost, etc., achieve high real-time efficiency, high data transmission rate, and increase the effect of sending length

Active Publication Date: 2021-09-24
10TH RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For a large-scale aviation airborne platform, there are dozens or hundreds of FPGA chips, and some FPGA chips contain multiple program versions. Once upgraded, the time cost is very large.
And in the traditional design, CPLD programming realizes Flash remote update, limited by CPLD internal RAM resources, generally, a single data transmission is limited to less than 2KByte, and transferring a file with a size of 20MByte requires 10240 times

Method used

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  • Method for remotely updating multi-version program of FPGA online
  • Method for remotely updating multi-version program of FPGA online
  • Method for remotely updating multi-version program of FPGA online

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Experimental program
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Embodiment Construction

[0023] refer to figure 1 . According to the present invention, the PPC processor is used to connect the field programmable logic gate array FPGA and the complex programmable logic device CPLD to form an FPGA program remote update control unit, the PPC uses the RapidIO bus to communicate with the FPGA, and the CPLD is connected through the highest 3-bit address Flash, storage for 8 different FPGA program versions; PPC processor receives FPGA program remote update command, sends update command to CPLD through local bus LocalBus, CPLD confirms the validity of received FPGA remote update command, and joins FPGA basic Version program remote update command filtering measures; start the FPGA basic version program loading process, load the FPGA basic version program from Flash to the internal operation of the FPGA; then switch the Flash high address to point to the Flash block space corresponding to the functional program version to be updated, and determine the FPGA After the basic ...

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Abstract

According to the method for remotely updating the multi-version programs of the FPGA online, hardware is simple, the real-time processing efficiency is high, and the fault-tolerant capability is high. According to the technical scheme, a PPC processor receives an FPGA program remote updating instruction and sends the updating instruction to a CPLD, after the CPLD verifies that the updating instruction is correct, an FPGA basic version program is loaded into the FPGA from Flash to run, then a Flash high-order address is switched to point to a Flash block space corresponding to a to-be-updated function program version, the FPGA receives a to-be-updated program file from the PPC, after data frame CRC (Cyclic Redundancy Check) is recieved and all program files to be updated are written, all data updated and written by the Flash at this time are read, the data is written into a corresponding Flash address space, the previously written data are read from the Flash, and secondary CRC is carried out, and a check result is reported to the PPC.

Description

technical field [0001] The invention relates to the field of aviation integrated systems, a method for realizing remote updating of FPGA multi-version programs through FPGA+PPC+CPLD control. Background technique [0002] With the development of integrated aviation technology, the functions realized are becoming more and more complex, and more and more businesses need to be processed. Field programmable gate array FPGA devices have the advantages of high density, low power consumption, high speed, and high reliability, and have been widely used in aerospace, communication, and industrial control. Different business functions can be realized by loading different versions of FPGA function programs. Since the FPGA device uses the SRAM technology, the configuration data in the FPGA will be lost when the power is turned off, so a non-volatile memory is needed to combine with the FPGA to complete the design of the embedded system. BPI (Byte-wide Peripheral Interface) Flash has th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F8/65G06F8/71
CPCG06F8/65G06F8/71
Inventor 朱道山蒋凯刘景元邵龙
Owner 10TH RES INST OF CETC
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