Silicon carbide split gate mosfet cell with integrated gated diode and preparation method

Abstract

The invention relates to a silicon carbide split gate MOSFET cell with integrated gate control diode and a preparation method thereof, belonging to the technical field of power semiconductor devices. The MOSFET of the present invention adopts the design of split gate to reduce the switching loss of the device; In order to reduce the reliability of the gate oxide caused by the structure, a P-type buried layer is added to reduce the electric field strength of the polysilicon edge gate oxide layer; an N-type conduction layer is added to introduce the current from the channel to the drift region of the device; In order to reduce the turn-on voltage drop of the parasitic body diode of the SiC MOSFET to reduce the reverse recovery current of the body diode, a gated diode based on the accumulation channel MOS structure is introduced on the other side of the MOSFET cell. The invention adopts the accumulation type channel to fully reduce the conduction loss of the diode, and makes the source metal contact the polysilicon of the gated diode on the sidewall by etching and filling the metal, thereby reducing the cell size.

Description

technical field [0001] The invention belongs to the technical field of power semiconductor devices, and in particular relates to a silicon carbide separated gate MOSFET cell with integrated gate-controlled diode and a preparation method thereof. Background technique [0002] The wide-bandgap semiconductor material SiC is an ideal material for the preparation of high-voltage power electronic devices. Compared with Si material, SiC material has a high breakdown electric field strength (4×10 6 V / cm), high carrier saturation drift velocity (2×10 7 cm / s), high thermal conductivity, good thermal stability, etc., so it is especially suitable for high-power, high-voltage, high-temperature and radiation-resistant electronic devices. [0003] SiC VDMOS is a commonly used device in SiC power devices. Compared with bipolar devices, since SiCVDMOS has no charge storage effect, it has better frequency characteristics and lower switching losses. At the same time, the wide band gap of SiC...

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Problems solved by technology

[0004] However, there are two problems in the planar SiC VDMOS. One is that the density of the JFET area is relatively high, which introduces a large Miller capacitance, which increases the dynamic loss of the device; the other is that the parasitic SiC body diode conduction voltage drop is too high. , and it is a bipolar device, which has a large reverse recovery current. In addition, the bipolar degradation phenomenon caused by the silicon carbide BPD defect makes the conduction voltage drop of the body diode continue to increase with the growth of service time. Therefore, The body diode of SiC VDMOS cannot be directly used as a freewheeling diode

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