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Preparation method of solder for eutectic bonding of bulge structure

A technology of eutectic bonding and solder, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve the problem of smaller spacing between adjacent raised structures, and improve the bonding effect, Effect of avoiding metal solder loss

Pending Publication Date: 2022-07-26
PEKING UNIV
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, preparing the adhesion and seed layers of eutectic bonding solder on top of the raised structures of the wafer also sputters metal on the sidewalls of the raised structures, resulting Metal solder is also grown, resulting in a smaller pitch between adjacent raised structures and even sidewall connections between adjacent raised structures

Method used

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  • Preparation method of solder for eutectic bonding of bulge structure
  • Preparation method of solder for eutectic bonding of bulge structure
  • Preparation method of solder for eutectic bonding of bulge structure

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preparation example Construction

[0024] Since the prior art prepares the adhesion layer and the seed layer of the eutectic bonding solder on the top of the bump structure, metal is also sputtered on the sidewall of the bump structure, so that when the metal solder is formed by electroplating, the sidewall is Metal solder also grows. In order to avoid the formation of metallic solder on the sidewalls of the raised structures, the present invention provides an improved method for preparing solder for eutectic bonding, which includes the following steps.

[0025] First, a substrate is provided, the substrate is provided with raised structures, and the top surfaces of the raised structures are bonding surfaces.

[0026] The substrate of the present invention can be a silicon wafer, a silicon-on-insulator wafer, a silicon-germanium wafer, a germanium wafer, a gallium nitride wafer, a SiC wafer, a quartz wafer or a sapphire wafer. The present invention has no particular limitation on the substrate, and conventiona...

Embodiment 1

[0056] First, a silicon wafer 100 is provided. Then, a microchannel 200 is formed on the upper surface of the silicon wafer 100 by photolithography and etching, and a schematic diagram of the partial structure of the obtained structure is shown in figure 1 As shown, 201 is the spacer wall of the microchannel 200 , and 202 is the bonding surface on the top of the spacer wall 201 .

[0057] Then, an adhesion layer 300 is formed by sputtering to cover the bonding surface 202 and the inner wall of the microchannel 200 , wherein the adhesion layer 300 is titanium with a thickness of 100 nanometers.

[0058] After that, the seed layer 400 is formed on the upper surface of the adhesion layer 300 by sputtering, and the partial structure diagram of the obtained structure is shown in figure 2 As shown, the seed layer 400 is gold with a thickness of 200 nanometers.

[0059] Next, a metal barrier layer 500 is formed on the upper surface of the seed layer 400 by sputtering, and the par...

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Abstract

The invention relates to a preparation method of a solder for eutectic bonding of a convex structure, and the method can selectively form the solder on the bonding surface of the convex structure through electroplating, and the side wall of the convex structure is wrapped with a non-conductive poly-p-xylylene layer. Therefore, the metal solder can be prevented from being formed on the side walls of the convex structures during electroplating.

Description

technical field [0001] The invention relates to the field of microelectronic process processing, in particular to a preparation method of solder used for eutectic bonding of raised structures. Background technique [0002] In the field of electronic devices, it is often necessary to bond a wafer with raised structures to another substrate. At present, the bonding process mainly includes: silicon-silicon bonding, anodic bonding and eutectic bonding. However, the high temperature required for the silicon-silicon bonding process results in a large thermal stress on the surface of the bonded wafer, which affects the bonding quality. The anodic bonding process has high requirements on the quality of the bonding surface, and the required pressure is large, which is prone to stress problems. The eutectic bonding process has become a more commonly used bonding method due to the low temperature required. [0003] However, when the adhesion and seed layers of eutectic bonding solde...

Claims

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Application Information

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IPC IPC(8): H01L21/60H01L23/488
CPCH01L24/11H01L24/13H01L24/81H01L2224/11019H01L2224/11825H01L2224/1302H01L2224/81355
Inventor 王玮杜建宇陈浪杨宇驰
Owner PEKING UNIV
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