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Double bit location rapid storage structure and mfg. method thereof

A memory, fast technology, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problems of increasing the density of storage cells known nitrides, incomplete erasing of read-only memory, etc.

Inactive Publication Date: 2006-05-31
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] The main purpose of the present invention is to provide a dual-bit fast memory element structure to increase the memory cell density and solve the problem of incomplete erasing of known nitride ROMs

Method used

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  • Double bit location rapid storage structure and mfg. method thereof
  • Double bit location rapid storage structure and mfg. method thereof
  • Double bit location rapid storage structure and mfg. method thereof

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Embodiment Construction

[0018] Please refer to Figure 5 to Figure 8 , Figure 5 to Figure 8 It is a schematic diagram of a method for manufacturing a double-bit flash memory unit according to the present invention. Such as Figure 5 As shown, the manufacturing method of the dual-bit flash memory unit of the present invention is to first provide a semiconductor chip 80 comprising a P-type silicon base (silicon base) 82, and then form a 50-150 Angstrom (angstrom) through high temperature oxidation (high temperature oxidation). , The silicon oxide layer of A) is on the surface of the substrate 82 and is used as the gate oxide layer 84 . followed by a pass through with silane (silane, SiH 4 ), germane (germane, GeH 4 ) and hydrogen (hydrogen) with a deposition temperature between 450° C. and 620° C. for chemical vapor deposition (chemical vapor deposition, CVD) process, so as to deposit a thickness of 500-1000 angstroms (A) Crystalline silicon germanium (polysilicon germanium, Si 1-x Ge x , x=0.0...

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Abstract

The invention provides a double-bit fast memory structure and a manufacturing method thereof. In the method, a gate oxide layer is first formed on the surface of a silicon substrate, and then a polycrystalline silicon germanium layer is formed on the surface of the gate oxide layer. An ion implantation process is then performed to form at least one insulating region in the polycrystalline silicon germanium layer to separate the polycrystalline silicon germanium layer into two mutually discontinuous conductive regions to form a double-bit structure. Next, a dielectric layer is formed on the surface of the polycrystalline silicon germanium layer, and a photolithography and etching process is performed to etch part of the dielectric layer and the polycrystalline silicon germanium layer to form the floating gate of the dual-bit flash memory pole. Finally, a control gate is formed on the floating gate.

Description

technical field [0001] The invention relates to a twin bit cell fast memory (flash memory devices) structure and a manufacturing method thereof. Background technique [0002] A read only memory (ROM) device is a semiconductor device used to store data, consisting of a plurality of memory cells, and has been widely used in computer data storage. Generally, according to the data storage method, read-only memory can be divided into Mask ROM (Mask ROM), Programmable ROM (PROM), Erasable programmable ROM (EPROM) ), Electrically Erasable Programmable Read-Only Memory (Electrically erasable programmable ROM, EEPROM), etc. [0003] Unlike other read-only memories that use polysilicon or metal floating gates to store charges, the main feature of nitride read only memory (NROM) is that it uses an insulating dielectric layer of silicon nitride as a charge trapping medium. medium). Due to the high density of the silicon nitride layer, the hot electrons tunneling into the silicon nitr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8239H01L21/8246H01L27/105H01L27/112H10B20/00H10B99/00
Inventor 张国华
Owner MACRONIX INT CO LTD