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GaAs base semiconductor-oxide insulating substrate and its preparation method

An oxide, insulating substrate technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of low yield of GaAs-based SOI substrates, formation of voids in substrates, device failures, etc. The effect of circuit integration density, interconnection capacitance and parasitic capacitance reduction, and production cost reduction

Inactive Publication Date: 2004-10-13
INST OF PHYSICS - CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is to overcome the defects that the yield of GaAs-based SOI substrate prepared by the existing double-sheet bonding method is too low, the cost is high, and holes are easily formed on the substrate, resulting in device failure.

Method used

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  • GaAs base semiconductor-oxide insulating substrate and its preparation method
  • GaAs base semiconductor-oxide insulating substrate and its preparation method
  • GaAs base semiconductor-oxide insulating substrate and its preparation method

Examples

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Embodiment 1

[0035] Embodiment 1. Make the GaAs-based SOI substrate that contains the AlAs layer of 50nm on GaAs substrate

[0036] like figure 1 As shown in the process flow diagram of the present invention, a gallium arsenide-based semiconductor-oxide insulating substrate containing an AlAs layer of 50nm is produced on a gallium arsenide substrate, and its specific steps are as follows:

[0037] 1. Commercially available GaAs substrates at 1×10 -10 In the background vacuum of Torr, under the protection of As molecular beams, the surface oxide film was removed by heating to 580°C, and then epitaxy was performed on the surface of 500nm under the conditions of Ga:As beam current ratio of 1:30 and substrate temperature of 580°C. GaAs buffer layer; then under the condition that the Al:As beam current ratio is 1:5 and the substrate temperature is 660°C, a 50nm AlAs layer is epitaxially grown on the surface of the GaAs buffer layer; finally, the GaAs beam current ratio is 1: 30. Under the con...

Embodiment 2

[0042] Embodiment 2. make Ga containing 100nm on GaAs substrate 0.1 al 0.9 GaAs-based SOI substrate with As layer

[0043] like figure 1 The process flow diagram of the present invention shown, on GaAs substrate, make the Ga that contains 100nm 0.1 al 0.9 The GaAs-based SOI substrate of the As layer, the specific steps are as follows:

[0044] 1. Commercially available GaAs substrates at 1×10 -10 In the background vacuum of Torr, under the protection of As molecular beams, the surface oxide film was removed by heating to 580°C, and then epitaxy was performed on the surface of 500nm under the conditions of Ga:As beam current ratio of 1:30 and substrate temperature of 580°C. GaAs buffer layer; then under the conditions of Al:As beam current ratio of 1:8 and substrate temperature of 630°C, 100nm Ga 0.1 al 0.9 As layer; finally, under the condition that the Ga:As beam current ratio is 1:30 and the substrate temperature is 580°C, a 100nm GaAs capping layer is epitaxially gro...

Embodiment 3

[0048] Embodiment 3. make the In that contains 200nm on GaAs substrate 0.01 Ga 0.09 al 0.9 As layers on GaAs-based SOI substrates such as figure 1 The process flow chart of the present invention shown, on GaAs substrate, make the In that contains 200nm 0.01 Ga 0.09 al 0.9 As layer SOI substrate, its specific steps are as follows:

[0049] 1. Commercially available GaAs substrates at 1×10 -10 In the background vacuum of Torr, under the protection of As molecular beams, the surface oxide film was removed by heating to 580°C, and then epitaxy was performed on the surface of 500nm under the conditions of Ga:As beam current ratio of 1:30 and substrate temperature of 580°C. GaAs buffer layer; and epitaxial 200nm In on the surface of the GaAs buffer layer under the same conditions 0.01 Ga 0.09 al 0.9 As layer; finally under the above-mentioned conditions, a GaAs capping layer of 500nm outside the surface of the AlAs layer;

[0050] 2. Carve the sample grown in step 1 into s...

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Abstract

The invention relate to a gallium arsenide-based semiconductor - oxide insulating substrate and making method. The insulating substrate includes a gallium arsenide substrate, there is a 20-2000nm thick Al-containing semiconductor compound layer formed by epitaxial growth on the gallium arsenide substrate, and there is a 5-500nm thick gallium arsenide layer covered on the semiconductor compound layer. It adopts AlAs side-oxidizing method for preparing. It has good thermal stability and can make secondary epitaxy, very beneficial to the performance of devices. In addition, it also enhances the flexibility of device structure, very adaptive to high-performance electronic device structure and photoelectric IC structure.

Description

technical field [0001] The invention relates to a gallium arsenide-based semiconductor-oxide insulating substrate and a preparation method thereof. technical background [0002] With the wide application of gallium arsenide (GaAs)-based field effect transistor (FET), high electron mobility transistor (HEMT) and heterojunction bipolar transistor (HBT) devices and circuits in the military field and civilian wireless communication field, Performance requirements continue to improve, and high temperature, high frequency, high power, high linearity, and radiation-resistant devices have become urgently needed. In the design and manufacture of the above-mentioned devices, it is unavoidable to consider the influence of short channel effect, back gate effect and other substrate and buffer layer factors on device performance. Silicon-based semiconductor-oxide insulating substrate (hereinafter referred to as Si-based SOI substrate) technology is a technology developed rapidly in the 1...

Claims

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Application Information

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IPC IPC(8): H01L21/00
Inventor 周均铭陈弘贾海强王文冲黄绮
Owner INST OF PHYSICS - CHINESE ACAD OF SCI
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