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Multi-layer insulator silicon material used for MEMS and method thereof

A technology of micromachining and superimposition, which is applied in the process of producing decorative surface effects, metal material coating process, coating and other directions, which can solve the problems that the advantages of SOI cannot be fully reflected and exerted.

Inactive Publication Date: 2008-01-23
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Nevertheless, in many application fields, many advantages of SOI over MEMS still cannot be fully reflected and brought into play.

Method used

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  • Multi-layer insulator silicon material used for MEMS and method thereof
  • Multi-layer insulator silicon material used for MEMS and method thereof

Examples

Experimental program
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Embodiment 1

[0021] For double-layer SOI materials, as shown in Figure 3(a), double-sided polished SOI wafers and single crystal silicon wafers are used to grow oxide layers on the top layer of SOI and the surface of silicon wafers, as shown in Figure 3(b). After semiconductor RCA standard cleaning, use Ar plasma bombardment for 5 to 120 seconds to increase the surface activity, and then melt and bond in a vacuum state. The bonding surface is the top silicon surface of SOI and the lower surface of the silicon wafer. 500°C, pressure range 10bar, after bonding, go through a high-temperature annealing process at 1100°C for 2 hours. The bonding process is shown in Figure 3(c). Finally, as shown in Figure 3(d), a double-layer SOI structure with desired thickness and roughness was obtained by grinding and chemical-mechanical polishing.

Embodiment 2

[0023] For a three-layer SOI material, as shown in Figure 4(a), two double-sided polished SOI wafers are used to grow an oxide layer on the surface of the SOI, as shown in Figure 4(b). After semiconductor RCA standard cleaning, use Ar plasma bombardment for 5 to 120 seconds to increase surface activity, and then melt and bond in a vacuum state. The bonding surface is the top silicon surface of two pieces of SOI. The temperature of fusion bonding is 500 degrees. The pressure range is 10 bar. After bonding, a high-temperature annealing process at 1100 degrees for 2 hours is performed. The bonding process is shown in Figure 4(c). Finally, as shown in FIG. 2 or FIG. 4(d), a three-layer SOI structure with desired thickness and roughness is obtained by grinding and chemical mechanical polishing.

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Abstract

The present invention relates to a multilayer SOI material and production method belonging to the field of MEMS, which is characterized in that a multilayer complex substrate made from SOI material (Silicon-On-Insulator) or similar SOI material is adopted. In addition, silicon-silicon bonding or melting bonding, bonding grinding and polishing or intelligent peeling are utilized to obtain the multilayer SOI material provided with a crystalline silicon layer and an embedded insulating layer staggered towards each other. The material conveniently realizes specific production of complex MEMS element and accurately controls some characteristic sizes of elements, thus consummating application of SOI to MEMS. As for micromechanical processing microelectronic elements isolated with grooves, the material is an effective solution to realize single chip integration.

Description

technical field [0001] The invention relates to a multilayer SOI (silicon on insulator) material and method for MEMS micromachining, belonging to the field of SOI materials. Background technique [0002] Due to the limitations of bulk silicon materials, SOI materials have become one of the most powerful candidates and substitutes for silicon materials in the MEMS field. In the SOI structure, the monocrystalline silicon film and the monocrystalline silicon substrate are separated by an insulating buried layer. The existence of the buried layer has many advantages in the application of the MEMS process: as an etching stop in the anisotropic etching of silicon Layer, silicon dioxide and silicon nitride can be very good self-stop corrosion for KOH and tetramethylammonium hydroxide (TMAH) etchant, compared with electrochemical self-stop corrosion, silicon wafers do not need electrical connection, and can be mass-produced Production; silicon dioxide can be used as a sacrificial l...

Claims

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Application Information

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IPC IPC(8): H01L27/12H01L23/00H01L21/20H01L21/84H01L21/762B81B7/02B81C1/00
Inventor 武爱民陈静孙佳胤王曦
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI