Passivation layer of IC chip

Abstract

The invention provides a passivant layer of an integrated circuit chip, which comprises at least a first silicon dioxide layer and a silicon nitride layer, wherein the first silicon dioxide is positioned under the silicon nitride layer; the invention is characterized in that the passivant layer also comprises a second silicon dioxide layer which is positioned between the first silicon dioxide layer and the silicon nitride layer. The passivant layer of the invention can effectively avoid a peeling off and dropping off between the passivant layer and a metal layer, between the metal layer and a medium insulating layer, thus improving yield of integrated circuit chips.

Description

technical field [0001] The invention belongs to the field of chip manufacturing, in particular to a passivation layer (Passivation) of an integrated circuit chip. Background technique [0002] The surface passivation of integrated circuits can reduce various charges in the oxide layer, enhance the device's ability to resist ion contamination, and protect circuits and internal interconnections from mechanical and chemical damage. Due to the difference in Young's modulus and thermal expansion coefficient of each layer of material, in the process of integrated circuit preparation, such as deposition, polishing, sputtering, photolithography, etc., the stress inside the film will change due to the corresponding temperature change, thus forming Voids, cracks or falling off, causing deformation of the integrated circuit structure and short circuit or open circuit of interconnection wires, resulting in device failure. [0003] The type and structure of the passivation layer have a ...

AI Technical Summary

Problems solved by technology

Due to the difference between the Young's modulus and the coefficient of thermal expansion of the first SiO2 layer 3 and the SiN layer 1, the first SiO2 under the above process 2 Both layer 3 and SiN layer 1 exert shrinkage stress on the metal layer, resulting in poor adhesion between the passivation layer and the metal layer, and between the metal layer and the dielectric insulating layer, forming peeling (Peeling) peeling off, and finally causing integrated circuit devices failure of

Images