Realization method and device of multiphase filter structure

Abstract

The invention discloses a realization method of a multiphase filter structure with synchronous arithmetic capability and real-time and variable orders, which realizes multiphase filtering operation and sampling rate transform on the basis of the scheme that structural repeatability of a branch filter in the multiphase filter structure is used, and a time-division multiplex kernel weighing summation unit is adopted. On the one hand, the scheme causes the multiphase filter structure to have synchronous data processing and throughput capacity with a working clock; on the other hand, the extract or interpolation rate of the multiphase filter structure can be dynamically changed by the online configuration of storage depth of data packet caching and the related operational control parameters, thus the multiphase filter structure has a function of the real-time and variable orders without additional hardware cost.

Description

technical field [0001] The invention belongs to the technical field of digital signal processing, and relates to the realization of a polyphase filter structure, more specifically, to a method and device for efficiently realizing a polyphase filter structure with synchronous operation capability and variable order. Background technique [0002] Digital signal processing is based on sampling and quantizing analog signals in the physical world. The sampling rate of digital signals usually depends on the physical characteristics of analog signals and the processing capabilities of the system. In the fields of digital communication, radar and electronic reconnaissance, instrumentation, digital audio and video, automatic control and other fields, the signals processed by the front and rear ends of the electronic system often have different physical characteristics (such as bandwidth, center frequency, etc.). A high digital signal sampling rate can greatly improve the processing e...

AI Technical Summary

Problems solved by technology

[0013] 1. Low efficiency: Traditional methods often require multiple clock cycles to complete the sorting and output of a set of data vectors, thus becoming an efficiency bottleneck

Although increasing the operating clock frequency can increase the processing speed, it will cause deterioration of stability and power consumption. If the operating frequency of the device has reached the upper limit at this time, the throughput requirement cannot be met.

[0014] 2. Poor flexibility: The traditional method can only achieve sorting for a specific extraction or interpolation rate (parameter). If the parameter needs to be changed, it can only be realized by switching different polyphase filter structures or sorters, such as Figure 13 As shown, and this will greatly increase hardware overhead, increase power consumption and cost

[0015] As people's requirements for processing efficiency, flexibility, power consumption and cost of electronic systems are getting higher and higher, the variable sampling rate signal processing algorithm based on the traditional polyphase filter structure implementation scheme has become increasingly unable to meet the requirements of digital communication and electronic countermeasures. , digital multimedia and other fields

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