Manufacturing method of SOI (Silicon On Insulator) nLDMOS (n Laterally Diffused Metal Oxide Semiconductor) device unit with P buried layer

A manufacturing method and device technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems that are not conducive to improving the reliability of devices and systems, saving energy and protecting the environment, affecting the withstand voltage performance of devices, and working efficiency of devices Low-level problems, achieve excellent electrical and thermal performance, facilitate heat dissipation, and improve work efficiency

Active Publication Date: 2012-09-05
江苏拓联智能科技有限公司
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  • Summary
  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] When a high voltage is applied to the drain of the SOI nLDMOS device manufactured by this method, the substrate does not participate in the withstand voltage due to the existence of the buried oxide layer, which seriously affects the withstand voltage performance of the device, and the thick buried oxide layer affects the heat dissipation of the device. Low working efficiency and easy to generate heat, which is not conducive to improving the reliability of devices and systems, saving energy and protecting the environment

Method used

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Embodiment Construction

[0026] The manufacturing method of the SOI nLDMOS device unit with P buried layer specifically comprises the following steps:

[0027]1. Select a polished thick-film SOI wafer as the initial material. The thick-film SOI wafer includes a P-type semiconductor substrate, a thin buried oxide layer, a P-type buried layer region, and an N-type top silicon film in sequence from bottom to top. The P-type semiconductor substrate and the P-type buried layer region are completely isolated by a thin buried insulating layer, and the N-type top layer silicon is covered on the P-type buried layer region for making devices and circuits;

[0028] 2. Carry out the first oxidation on the upper surface of the bare top silicon film, the thickness of the oxide layer is 50-100nm, use the etching method to perform the first etching, remove the oxide layer on the surface of the top silicon film to eliminate mechanical damage, clean and bake dry; perform a second oxidation on the exposed silicon surfac...

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Abstract

The invention relates to a manufacturing method of an SOI (Silicon On Insulator) nLDMOS (n Laterally Diffused Metal Oxide Semiconductor) device unit with a P buried layer. An SOI nLDMOS device manufactured by the traditional method seriously influences the voltage withstanding property of the SOI nLDMOS device and influences the heat radiation of the SOI nLDMOS device. The SOI nLDMOS device with the P buried layer is manufactured by carrying out photoetching on an SOI thick film material with the P buried layer for nine times. The manufactured SOI nLDMOS device bears the vast majority of withstand voltages through a depletion layer formed by a reverse biased PN junction positioned between an N type top silicon film and a P type buried layer when the voltages of a blocking-state drain electrode are increased, thereby enhancing the longitudinal voltage withstanding property of the SOI nLDMOS device and breaking the bottleneck of limiting the improvement of horizontal withstand voltages due to over-low longitudinal withstand voltages; and in addition, the thin buried oxide layer is beneficial to the heat radiation of the SOI nLDMOS device, thereby effectively reducing the self-heating effect. The manufacturing method ensures that electrical and thermal properties of the SOI nLDMOS device integrating power and radio frequency are remarkably improved, and is beneficial to saving ofthe resources and the energy and protecting of the environment.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, and relates to an SOI (semiconductor on insulating layer) CMOS (semiconductor on insulating layer) nLDMOS (n-type lateral double injection metal-oxide-semiconductor field effect transistor) device unit with a P buried layer (Complementary Metal-Oxide-Semiconductor) VLSI (Very Large Scale Integration) integrated fabrication method. Background technique [0002] SOI nLDMOS devices are used as non-contact power electronic switches due to their small size and weight, high operating frequency, high operating temperature and strong radiation resistance, low cost and high reliability. , power drivers, or RF power amplifier transistors are widely used in technical fields such as intelligent power electronics, high-temperature environment power electronics, space power electronics, vehicle power electronics, military and communications. SOI CMOS VLSI process technology has advantages such as high ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/8238
Inventor 张海鹏许生根赵伟立刘怡新吴倩倩孔令军汪洋
Owner 江苏拓联智能科技有限公司
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