Ultrahigh-speed burst mode clock restoring circuit based on gate-control oscillator

Abstract

The invention provides an ultrahigh-speed burst mode clock restoring circuit based on a gate-control oscillator, comprising the gate-control oscillator, four frequency dividers, a frequency-discrimination device, a charge pump, a low-pass filter, an interior clock buffer and a semi-velocity data restoring circuit. The ultrahigh-speed burst mode clock restoring circuit is characterized in that an output clock of the gate-control oscillator can restore a clock signal from input data of any phases within a plurality of bit times when data turn over under traction action of the input data, wherein the phase of the clock signal is aligned with the phase of the input data; the four frequency dividers, the frequency-discrimination device, the charge pump, the low-pass filter and the interior clock buffer are used for analyzing relation of output lock signal frequency and reference frequency and providing a control signal for the gate-control oscillator, and the semi-velocity data restoring circuit resets the data according to the restored clock signal to generate a restored data signal. The ultrahigh-speed burst mode clock restoring circuit disclosed by the invention is suitable for an optical fiber communication system, and in particular relates to a burst mode optical communication system taking a ten-gigabit Ethernet passive optical network technology as representation.

Description

technical field [0001] The invention relates to the clock data recovery technology and circuit design of the ultra-high-speed burst mode, and is especially suitable for the burst mode optical receiver of the 10 Gigabit Ethernet passive optical network system. Background technique [0002] With the continuous advancement of the global informatization wave, users' demand for bandwidth is increasing day by day. Optical fiber access technology based on passive optical network technology has huge advantages in both capacity and cost, and is listed as an important part of the national information development strategy of various countries. In September 2009, the IEEE 802.3av standard was released, that is, the 10Gb / s Ethernet Passive Optical Network (10G-EPON) standard was released, becoming the most concerned future network broadband access technology. [0003] The 10G EPON system adopts a point-to-multipoint tree network topology. A single optical line terminal is connected to N...

AI Technical Summary

Problems solved by technology

The gated oscillator is usually implemented with a ring oscillator and an AND gate. This method can complete the phase adjustment of the input in real time. The circuit is relatively simple, but the disadvantage is that the phase noise characteristics of the recovered clock are slightly worse. It is often used in burst mode clock recovery at a high rate, and this circuit structure is also difficult to work under ultra-high speed conditions

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