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Bi CMOS (Complementary Metal-Oxide-Semiconductor) integrated device with mixed crystal plane and Si vertical channel and preparation method thereof

A vertical channel, mixed crystal plane technology, used in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problems of limitation, low mobility of Si material carrier materials, etc.

Inactive Publication Date: 2012-10-10
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Due to the low mobility of Si material carrier materials, the performance of integrated circuits manufactured using Si BiCMOS technology, especially the frequency performance, is greatly limited; for SiGe BiCMOS technology, although SiGe HBT is used for bipolar transistors, However, Si CMOS is still used for unipolar devices that restrict the improvement of the frequency characteristics of BiCMOS integrated circuits, so these limit the further improvement of the performance of BiCMOS integrated circuits

Method used

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  • Bi CMOS (Complementary Metal-Oxide-Semiconductor) integrated device with mixed crystal plane and Si vertical channel and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0111] Embodiment 1: Prepare 22nm mixed crystal plane strained Si vertical channel BiCMOS integrated device and circuit, the specific steps are as follows:

[0112] Step 1, SOI substrate material preparation.

[0113] (1a) Select the N-type doping concentration as 1×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0114] (1b) Select the N-type doping concentration as 1×10 15 cm -3 The Si sheet with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the lower layer;

[0115] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;

[0116] (1d) Put the oxide layer on the surface of the polished ...

Embodiment 2

[0169] Embodiment 2: Prepare 30nm mixed crystal plane strained Si vertical channel BiCMOS integrated device and circuit, the specific steps are as follows:

[0170] Step 1, SOI substrate material preparation.

[0171] (1a) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0172] (1b) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the lower layer;

[0173] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;

[0174] (1d) Put the oxide layer on the surface of the polishe...

Embodiment 3

[0227] Embodiment 3: Preparation of 45nm mixed crystal plane strained Si vertical channel BiCMOS integrated device and circuit, the specific steps are as follows:

[0228] Step 1, SOI substrate material preparation.

[0229] (1a) Select the N-type doping concentration as 5×10 15 cm -3 Si wafers with a crystal plane of (100) are oxidized on the surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0230] (1b) Select the N-type doping concentration as 5×10 15 cm -3 The Si wafer, the crystal plane is (110), the surface is oxidized, and the thickness of the oxide layer is 1 μm, which is used as the base material of the lower active layer;

[0231] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;

[0232] (1d) Put the oxide layer on the surface of the polis...

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Abstract

The invention discloses a Bi CMOS (Complementary Metal-Oxide-Semiconductor) integrated device with a mixed crystal plane and a Si vertical channel and a preparation method of the device. The preparation process is as follows: preparing an SOI (Silicon-On-Insulator) substrate, taking upper-layer base material as a crystal plane (100) and taking lower-layer base material as a crystal plane (110); growing N type Si epitaxy on a substrate sheet to prepare a deep-trench isolator, and manufacturing a conventional Si bipolar transistor in a bipolar device region; etching a deep trench in an active region of a PMOS (P-Channel Metal Oxide Semiconductor) device, selectively growing an active layer of a strain Si PMOS device, and preparing a compressive strain PMOS device with a vertical channel on the active layer; and etching a deep trench in an active region of an NMOS (N-Channel Metal Oxide Semiconductor) device, selectively growing an active layer of a strain Si NMOS device, and preparing a tensile strain NMOS device with a plane channel on an epitaxial layer. According to the Bi CMOS integrated device with the mixed crystal plane and the Si vertical channel and the preparation method, the characteristics that the mobility ratio of strain Si material is higher than the stress of body Si material and the strain Si material, and the mobility ratio is anisotropic are utilized, and based on the SOI substrate, the Bi CMOS integrated device with the mixed crystal plane and the Si vertical channel and a circuit, which are excellent in performance, are prepared.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, and in particular relates to a mixed crystal plane strained Si vertical channel BiCMOS integrated device and a preparation method. Background technique [0002] The integrated circuit, which appeared in 1958, is one of the most influential inventions of the 20th century. Microelectronics, which was born based on this invention, has become the basis of existing modern technology, accelerating the process of knowledge and informationization of human society, and at the same time changing the way of thinking of human beings. It not only provides humans with a powerful tool to transform nature, but also opens up a broad space for development. [0003] Semiconductor integrated circuits have become the basis of the electronics industry, and people's huge demand for the electronics industry has prompted the rapid development of this field. In the past few decades, the rapid d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12H01L21/84
Inventor 胡辉勇宣荣喜张鹤鸣吕懿王斌舒斌宋建军郝跃
Owner XIDIAN UNIV
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