High-density silica back sealing process for heavily-doped-phosphorous monocrystalline silicon wafer
A silicon dioxide and silicon wafer technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as unsatisfactory requirements and insufficient compactness of silicon dioxide films, achieving strong practicability and improving Dense, highly feasible effect
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[0019] Example: 1) The thickness of 6 inches (150mm in diameter) after preparation for back damage and cleaning is 642μm, and the dopant is P, Single crystal silicon wafers with crystal orientation and resistivity of 0.0008-0.00018Ω·cm are used as raw materials; 2) The silicon wafers after back damage and cleaning are placed on the upper stage of the back sealer (the back sealer model is AMAYA A63007); 3) At this time, the silicon wafer is placed on the silicon carbide tray by the manipulator and transported to the reaction chamber; 4) Silane and oxygen are introduced into the reaction chamber, the concentration ratio of which is silane: oxygen = 1:10; 5) The heating temperature of the heating unit at the bottom of the silicon carbide tray is 700 ℃, and the silicon wafer is covered with a cooling water unit to keep the surface temperature of the silicon wafer at 430 ℃; 6) The reaction is carried out by the nozzle in the reaction chamber Substance silicon dioxide is deposited on...
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