A high-speed bump electroplating method for copper interconnects
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANGHAI SINYANG SEMICON MATERIALS
- Publication Date
- 2015-09-16
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Abstract
Description
technical field
[0001] The invention relates to an electroplating method for preparing copper bumps on a wafer, in particular to a high-speed bump electroplating method for copper interconnection. Background technique
[0002] The traditional interconnection process technology of semiconductor chips is a thin film process of aluminum process. However, when the line width is less than 0.18um, reliability problems such as signal delay and electromigration seriously affect the reliability of integrated circuits. In 1999, IBM took the lead in developing the damascenes chip copper interconnection process, and achieved mass production of the chip copper interconnection process in 2000. Copper metal is considered to be an excellent chip interconnection material due to its excellent electrical conductivity, thermal conductivity, low melting point and easy extension. As the feature size of the chip line width becomes smaller and smaller, the traditional packaging method can no long...