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Method of preparing groove grid-control semiconductor power device

A technology for power devices and semiconductors, which is applied in the field of preparation of trench-type gate-controlled semiconductor power discrete devices, can solve the problems of complex steps, poor breakdown voltage and reliability of semiconductor devices, and difficulty in generating

Inactive Publication Date: 2014-03-12
SHENZHEN LIZHEN SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In the existing trench power MOSFET design and manufacturing field, the base region and the source region of the MOSFET are introduced by the steps of base region mask and source region mask respectively. In order to reduce the manufacturing cost, some previous proposals, Such as an article published in the Japanese Journal of Applied Physics (Japanese Journal of Applied Physics Vol 47, No.3, 2008, pp.1507-1511), or US patent documents US20110233667, US20090085074, US20110233666, US077996427, etc., try to omit The manufacturing method of the mask step of the base region or the source region, the steps are relatively complicated and difficult to produce, or its termination structure is not good, so that the breakdown voltage and reliability of the manufactured semiconductor device are relatively poor

Method used

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  • Method of preparing groove grid-control semiconductor power device
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  • Method of preparing groove grid-control semiconductor power device

Examples

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Embodiment 1

[0087] like figure 1 As shown, the epitaxial layer 200 is placed above the substrate 10. First, an oxide layer 400 (with a thickness of 0.3um to 1.5um oxide hard mask) is formed on the epitaxial layer by deposition or thermal growth, and then on the oxide layer A photoresist coating 1000 is deposited and then patterned through a trench mask to expose portions of the oxide layer.

[0088] like figure 2 As shown, after dry etching the oxide layer exposed by patterning the trench mask, the epitaxial layer is exposed, and then the photolithographic coating is removed.

[0089] like image 3 As shown, implant P-type dopants on the surface of the silicon wafer (the dose is 2e12 / cm 3 to 2e14 / cm 3 ), the part covered by the original oxide layer 400 has not been implanted, the part not covered by the original oxide layer, the P-type dopant will be injected into the surface of the epitaxial layer to form a P-type region, and the P-type dopant can be B11 (boron boron ).

[0090] ...

Embodiment 2

[0101] It is an embodiment of the present invention.

[0102] Step and embodiment 1 are by Figure 1 to Figure 8 Same, then utilize the source region mask step to form the N-type source region 204, and the remaining steps are the same as in Embodiment 1 by Figure 10 to Figure 13 same.

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Abstract

The invention discloses a method of preparing a groove grid-control semiconductor power device. The method comprises the steps of first, injecting an P-type dopant into an epitaxial layer on a substrate by use of a groove mask to form a P-type base region, and eroding on the epitaxial layer to form a plurality of grooves; then injecting an N-type dopant into the epitaxial layer to form an N-type source region, then depositing an interlayer dielectric on the surface of the epitaxial layer, eroding the interlayer dielectric by use of a contact hole mask to form an opening in the interlayer dielectric, eroding the surface of the epitaxial layer later to form a contact hole groove and carrying out metal plugging filling on the contact hole groove; and finally, depositing a metal layer on the surface of a device, and carrying out metal eroding by use of a metal mask to form a metal cushion layer and connection wires. By adopting the method of preparing the groove grid-control semiconductor power device, preparation procedures of base region masking and source region masking are eliminated, and the preparation cost of the device is greatly reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor power discrete devices, in particular to a method for preparing a trench gate-controlled semiconductor power discrete device. Background technique [0002] At present, power MOSFET (Metal Oxide Semiconductor Field Effect Transistor, Metal Oxide Semiconductor Field Effect Transistor) has been widely used in various electronic and communication products, computers, consumer appliances, automobiles, etc. At the same time, it also has various applications in industry. [0003] Power semiconductor devices represented by power MOSFETs can effectively control high-frequency large currents due to their low on-resistance and high-speed switching. At the same time, power MOSFETs are being widely used as small power conversion components such as power amplifiers, power converters, low noise amplifiers, and some personal computer power supply switches and power circuits, which are characterized by low p...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L29/78
CPCH01L21/76877H01L29/66712H01L29/7813
Inventor 苏冠创
Owner SHENZHEN LIZHEN SEMICON
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