44results about How to "Does not affect electrical characteristics" patented technology

A post-CMP washing liquid composition is provided which includes one type or two or more types of aliphatic polycarboxylic acids and one type or two or more types selected from the group consisting of glyoxylic acid, ascorbic acid, glucose, fructose, lactose, and mannose, and which has a pH of less than 3.0. This washing liquid has excellent performance in removing micro particles and metal impurities adhering to the surface of a semiconductor substrate after CMP and does not corrode a metal wiring material.

A method of manufacturing a flexible display includes forming a silicon sacrificial layer on a rigid base material layer, affixing a flexible base material layer to the silicon sacrificial layer by an adhesive layer, forming a display element layer on the flexible base material layer, and utilizing a fluorine-containing corrosive gas to etch and gasify the silicon sacrificial layer to cause the flexible base material layer to separate from the rigid base material layer. A substrate for manufacturing a flexible display includes a rigid base material layer, a silicon sacrificial layer disposed on the rigid base material layer, an adhesive layer disposed on the silicon sacrificial layer, a flexible base material layer disposed on the adhesive layer, and a display element layer disposed on flexible base material layer.

A chip cutting method for increasing LED chip light extraction is disclosed. The method comprises the following steps: using a laser to make a scratch on a right side of the chip; then, using a diamond saw blade knife to carry out saw blade along the scratch, wherein the saw blade knife is a bilaterally symmetrical isosceles inverted triangle and an included angle of a knife side surface and a horizontal line is 30-60 DEG; adjusting a knife height of the saw blade knife so that an epitaxial layer is just sawed through; carrying out overturn and inverted membrane on the chip after the saw blade is finished; using a splinter knife to carry out splinter on a back side of the chip along the laser scratch. According to the invention, through a saw blade technology, an epitaxial layer edge of the chip, which is about 10micron, is sawed into an inclined platform. A chip light extraction rate can be increased by more than 20%. Simultaneously, chip appearance is improved. A technology operation is simple and is easy to be realized.

The invention provides a system restart circuit and a system restart method thereof. The reset circuit includes a capacitive element, the first end of which is coupled to the first voltage level; a reset switch is used to selectively couple the second end of the capacitive element to the first voltage level; the first circuit, It is used to establish a current path between the second voltage level and the capacitive element within the restart time, and set the voltage level of the start signal of the system power supply circuit at its output end according to the voltage level of the second end of the capacitive element. level; and the second circuit is used to control the first circuit to continuously establish the current path during the restart time. In this way, the present invention will automatically restart the system when a restart signal is detected, and the purpose of hardware restart can be achieved at a relatively low cost.

The invention discloses a low-voltage Darlington amplifier. It includes a basic Darlington amplifying unit, an AC-DC separation unit and a power supply voltage polarity conversion unit. The circuit of the present invention separates the AC and DC grounds of the Darlington amplifier unit, and clamps the AC ground to the ground; the circuit of the present invention clamps the DC reference ground of the Darlington amplifier to a negative reference level, thereby improving the power supply Potential difference between voltage and DC reference ground. The power supply voltage of the traditional Darlington amplifier is generally higher than 5-7V, and the power supply voltage of the low-voltage Darlington amplifier of the present invention can be as low as 3-4V. The invention is widely used in various Darlington structure circuits in microwave monolithic ICs.

The invention discloses a method of preparing a groove discrete semiconductor device. The method comprises the following steps: first, injecting P type dopant into an epitaxial layer of a substrate to form a P type area I by using a groove mask, and carrying out etching on the external layer to form a plurality of grid electrode grooves; then depositing interlamination media on the surface of the external layer, carrying out etching on the interlamination media by using a contact hole mask to form openings in the interlamination media, and injecting the P type dopant and N type dopant to the openings to form a P type area II and an N type source region respectively, wherein the P type area I and the P type area II are combined into a P type base region; then carrying out etching on the surface of the external layer to form contact hole grooves, and carrying out metal plugging filling on the contact hole grooves; and finally, depositing a metal layer on the surface of a device, carrying out metal etching by using metal mask to form a metal cushion layer and connection wires. By adopting the method of preparing the groove discrete semiconductor device, preparation procedures of base region masking and source region masking are eliminated, and the preparation cost of the device is made to be greatly reduced.

The invention relates to a transparent electrode structure and a preparation method thereof, particularly relates to a transparent electrode structure of a GaN-based LED (Light Emitting Diode) with high light extraction efficiency and a preparation method thereof and belongs to the technical field of LED semiconductor devices. According to the technical scheme provided by the invention, the transparent electrode structure comprises a GaN substrate, wherein the GaN substrate is provided with a nano column layer and an ITO (Indium Tin Oxide) layer covering the nano column layer; the nano column layer comprises a plurality of nano columns; the ITO layer covers on the nano columns and column disconnecting holes at the two sides of the nano columns are filled with the ITO layer, so that the ITO layer and the GaN substrate are contacted. The transparent electrode structure has the advantages that the light extraction efficiency of the GaN-based positive LED can be obviously improved, the process operation is convenient, the cost is low, the application range is wide, and the safe and reliable effects are achieved.

The invention discloses a preparation method of a trench semiconductor power discrete device. The preparation method of the trench semiconductor power discrete device includes a first step of injecting P-type dopant into an epitaxial layer arranged on a substrate to form P-type base regions through a trench mask and conducting corrosion on the epitaxial layer to form a plurality of grid trenches; a second step of depositing interlayer mediums on the epitaxial layer, conducting the corrosion on the interlayer mediums through a contact hole mask, forming trenches in the interlayer mediums, injecting N-type dopant to form N-type source regions, conducting the corrosion on the surface of the epitaxial layer to form contact trenches, and conducting metal plugging filling on the contact trenches; and a third step of depositing a metal layer on the surface of the discrete device, conducting metal corrosion through a metal mask and forming a metal substrate layer and a connecting wire. The preparation method of the trench semiconductor power discrete device eliminates preparation procedures of a base region mask and a source region mask, and therefore the manufacturing cost of the discrete device is greatly reduced. In addition, original electrical characteristics of the discrete device cannot be influenced.

The invention discloses a method of preparing a trench semiconductor power discrete device. The method comprises the following steps of firstly injecting P-type doping agents into an epitaxial layer on a substrate through a trench mask to form P-type base regions, and then eroding the epitaxial layer to form a plurality of grid trenches; injecting N-type doping agents into side walls of the tops of the trenches to form N-type source regions; then, settlinginterlayer dielectric on the surface of the epitaxial layer, eroding the interlayer dielectric and the surface of the epitaxial layer to form contact trenches by means of a contact hole mask, and filling the contact trenches with metal plugs; and finally, settling a metal layer on the upper surface of the device, and conducting metal erosion through a metal mask to form a metal cushion layer and a connection line. By means of the preparing method, preparing processes of a base-region mask and a source-region mask are omitted, and therefore manufacturing cost of the device is greatly lowered; and meanwhile, original electrical characteristics of the device is not influenced, and therefore the price performance ratio of the device is increased.