44results about How to "Does not affect electrical characteristics" patented technology

The invention relates to a microwave deicing device for an electric power facility, in particular to a microwave deicing device for an electric power facility and a deicing method thereof. The microwave deicing device mainly comprises a mobile device, a microwave-radiation ice-melting device and a microwave electrode ice-cutting knife. The deicing method for the device adopts a microwave-radiation ice-melting mode and a microwave electrode ice-cutting mode, the different ice-covered states can be handled through the organic combination and the mutual matching of the two models, and the deicing is performed to the ice-covered insulator for the electric power facility.

The invention discloses a GaN-based enhancement/depletion mode heterojunction field effect transistor with a buried gate structure. The GaN-based enhancement/depletion mode heterojunction field effect transistor is mainly composed of a substrate, an AlInGaN buffer layer, a buried gate, a buried gate dielectric layer, a GaN channel layer, an AlInGaN barrier layer, a gate dielectric layer, a source electrode, a drain electrode and a gate electrode from bottom to top, wherein the source electrode and the drain electrode are arranged on the AlInGaN barrier layer, and the gate electrode is arranged on the gate dielectric layer. The source electrode and the drain electrode are in ohmic contact with the AlInGaN barrier layer, and the source electrode and the gate dielectric layer are in Schottky contact. The buried gate dielectric layer and the buried gate are both placed in the AlInGaN buffer layer, and the buried gate is placed in the buried dielectric layer. Through independent bias arrangement of the buried gate, according to the different bias arrangement of the buried gate, the threshold voltage of devices is adjusted; when the buried gate is in a negative bias state, two-dimensional electron gas in the AlInGaN barrier layer is exhausted by the buried gate, and the devices are made to achieve enhancement mode work; when the buried gate is in a zero bias state or a positive bias state, the two-dimensional electron gas exists in the AlInGaN barrier layer, and the devices are made to achieve depletion mode work.

The invention provides a graphene carbon nano tube composite film and a preparation method and application thereof. The preparation method comprises the following steps that S1, a substrate is provided, and the whole or at least one face of the substrate is made of a graphene catalyst; S2, electroplating is conducted, thus, a carbon nano tube is attached to the surface of the substrate, and the graphene catalyst is not fully covered with the carbon nano tube; and S3, graphene continues to grow on the face, containing the graphene catalyst, of the substrate through a chemical gas phase method,and the graphene carbon nano tube composite film is obtained. The graphene carbon nano tube composite film and the preparation method and application thereof have the characteristic of being simple intechnology, the graphene carbon nano tube composite film obtained through the non-transferring self growing technology is good in quality, and contact and attaching between the composite film and thecatalyzing substrate are good.

The invention discloses a method of preparing a groove grid-control power device, the method comprising the steps of first eroding an epitaxial layer on a substrate by use of a groove mask to form a plurality of grooves; then, injecting a P-type dopant and an N-type dopant into the epitaxial layer to form a P-type base region and an N-type source region respectively, then depositing an interlayer dielectric on the surface of the epitaxial layer, eroding the interlayer dielectric by use of a contact hole mask to form an opening in the interlayer dielectric, eroding the surface of the epitaxial layer later to form a contact hole groove and carrying out metal plugging filling on the contact hole groove; and finally, depositing a metal layer on the surface of a device, and carrying out metal eroding by use of a metal mask to form a metal cushion layer and connection wires. By adopting the method of preparing the groove grid-control power device, preparation procedures of base region masking and source region masking are eliminated, and the preparation cost of the device is greatly reduced.

The invention discloses a method of preparing a groove grid-control semiconductor power device. The method comprises the steps of first, injecting an P-type dopant into an epitaxial layer on a substrate by use of a groove mask to form a P-type base region, and eroding on the epitaxial layer to form a plurality of grooves; then injecting an N-type dopant into the epitaxial layer to form an N-type source region, then depositing an interlayer dielectric on the surface of the epitaxial layer, eroding the interlayer dielectric by use of a contact hole mask to form an opening in the interlayer dielectric, eroding the surface of the epitaxial layer later to form a contact hole groove and carrying out metal plugging filling on the contact hole groove; and finally, depositing a metal layer on the surface of a device, and carrying out metal eroding by use of a metal mask to form a metal cushion layer and connection wires. By adopting the method of preparing the groove grid-control semiconductor power device, preparation procedures of base region masking and source region masking are eliminated, and the preparation cost of the device is greatly reduced.

The invention discloses a discharge detection system and method based on a poly-p-xylylene film and charged particles. Based on a film deposition technology, a poly-p-xylylene film is deposited in a complex, closed and micro electrical and electronic system and on the surface of an electrical and electronic system in an embedded manner; the micron-sized poly-p-xylylene film is conformal with an electrical and electronic system, so that large-area, all-around and dead-angle-free coverage in the electrical and electronic system is realized; based on a poly-p-xylylene film polarity technology andin combination with the electrostatic interaction of charged particles, discharge detection of the whole electrical and electronic system, precise discharge positioning of the electrical and electronic system in the system and calculation of discharge key parameters are realized; according to the invention, the universality of the discharge detection technology is improved, and the problem that the existing discharge detection technology cannot realize the detection and accurate positioning of the internal discharge of a complex, closed and micro system is solved; the effectiveness and the precision of the discharge detection technology are improved; and the robustness of the discharge detection technology for resisting the interference of the internal environment of the system is improved.

The invention discloses a preparation method of a trench semiconductor power discrete device. The preparation method of the trench semiconductor power discrete device includes a first step of injecting P-type dopant into an epitaxial layer arranged on a substrate to form P-type base regions through a trench mask and conducting corrosion on the epitaxial layer to form a plurality of grid trenches; a second step of depositing interlayer mediums on the epitaxial layer, conducting the corrosion on the interlayer mediums through a contact hole mask, forming trenches in the interlayer mediums, injecting N-type dopant to form N-type source regions, conducting the corrosion on the surface of the epitaxial layer to form contact trenches, and conducting metal plugging filling on the contact trenches; and a third step of depositing a metal layer on the surface of the discrete device, conducting metal corrosion through a metal mask and forming a metal substrate layer and a connecting wire. The preparation method of the trench semiconductor power discrete device eliminates preparation procedures of a base region mask and a source region mask, and therefore the manufacturing cost of the discrete device is greatly reduced. In addition, original electrical characteristics of the discrete device cannot be influenced.

The invention discloses a preparation method for a groove semiconductor discrete device. The preparation method for the groove semiconductor discrete device includes the following steps: firstly, eroding an epitaxial layer by utilization of a groove mask to form a plurality of grid electrode grooves; then depositing interlayer medium on the surface of the epitaxial layer, eroding the interlayer medium by utilization of a contact hole mask, open holes are formed in the interlayer medium, injecting p-type and n-type dopant to respectively form a p-type base area and a n-type source area, eroding the surface of the epitaxial layer to form contact grooves, and filling the contact grooves through metal inserting plugs; and finally, depositing a metal layer on the upper surface of the device, and performing metal erosion by utilization of a metal mask to form a metal padding layer and connecting lines. By adoption of the preparation method, the preparation processes of a base area mask and a source area mask are omitted, and manufacturing cost of the device is enabled to be reduced greatly; and meanwhile, original electric properties and reliability of the device can not be affected, and therefore the performance/cost ratio of the device is increased.

The present invention discloses an avalanche photodiode optimized based on a photonic crystal broadband total reflector and a manufacturing method thereof. The avalanche photodiode is a one-dimensional photonic crystal broadband total reflector alternately formed by multiple layers of SiO2 dielectric films and TiO2 dielectric films at the back surface of the substrate of a normal incidence avalanche photodiode or the front surface of a back incidence avalanche photodiode. The one-dimensional photonic crystal broadband total reflector reflects light which is not absorbed by an absorption layerin the incident light back to the absorption layer in the avalanche photodiode for absorption again. Compared to a current avalanche photodiode, the one-dimensional photonic crystal broadband total reflector is added to reflect the light which is not absorbed by the absorption layer back to the absorption layer for secondary absorption for all the incident light with different angles with opticalcommunication wave bands of 1310-1675nm without influence of the device frequency response so as to increase the quantum efficiency and responsivity of the device and improve about 50% performances ofthe device.

The invention provides a manufacturing method for a two-sided copper flexible circuit board. The manufacturing method at least comprises the following steps: step 1, providing a polyimide base membrane, on the first surface of which, copper foil is formed, and forming a peelable mask pattern on the second surface of the base membrane, wherein the area, which is not covered by the peelable mask pattern, on the second surface of the base membrane constitutes a copper circuit figure; step 2, sputtering copper on the second surface of the base membrane, so as to form a copper membrane on the peelable mask pattern and the copper circuit on the copper circuit figure; step 3, tearing off the copper membrane on the peelable mask pattern and manufacturing to obtain the two-sided copper flexible circuit board. The manufacturing method has the advantages as follows: the ultrathin two-sided copper flexible circuit board can be manufactured, the process is simple, the 20-30% of production cost can be reduced, the manufacturing of the copper circuit is based on an addition process, waste emission is reduced, and environmental pollution is reduced; meanwhile, the torn copper membrane can be recycled after being cleaned simply, and material waste can be reduced.

The present invention discloses a chip scale package diode component with an ultra-low forward voltage and a manufacture method. According to the diode component, all regions except a second electrodeare directly adopted as a first electrode, and/or the front surface and back surface of the first electrode are penetrated through perforation, and are conducting, and then cutting is performed, so that a chip scale package diode component finished product with a smaller size can be obtained. Since the first electrode is not required to be conducting through an epitaxial layer or a diffusion layer, and therefore, internal resistance can be avoided, a forward voltage can be lowered. With the manufacture method adopted, a manufacture process is simplified, quality can be improved, costs can bereduced, and the diode component can be lighter, shorter and smaller.

The invention belongs to the field of ultrasonic imaging equipment, and discloses an ultrasonic transducer. The ultrasonic transducer comprises a base, a lower piezoelectric ceramic piece, a cushion block, a stainless steel elastic sheet support, a cantilever, a probe and upper piezoelectric ceramic pieces. A groove is formed in the upper surface of the base, and the lower piezoelectric ceramic piece is installed in the groove of the base and is connected with the cushion block; the stainless steel elastic sheet support is connected with the base through the cushion block, the stainless steel elastic sheet support and the cushion block cooperate to clamp one end of the cantilever, and the probe is fixedly installed at the other end of the cantilever; the two upper piezoelectric ceramic pieces are installed on the upper surface of the end, close to the cushion block, of the stainless steel elastic sheet support, and each upper piezoelectric ceramic piece is installed on the stainless steel elastic sheet support through a turnup electrode. The ultrasonic transducer and the cantilever are integrated in a split mode, the probe can be replaced conveniently, and high-frequency composite ultrasonic waves can be generated.