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A method for preparing trench semiconductor power discrete devices

A technology of discrete devices and semiconductors, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as complicated steps, poor terminal structure of semiconductor devices, and difficult generation, so as to reduce manufacturing costs and increase performance and price than the effect

Inactive Publication Date: 2016-02-10
立新半导体有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In the existing field of design and manufacture of trench power MOSFETs, the base region and the source region of the MOSFET need to be introduced by the steps of base region mask and source region mask respectively, and some previously proposed, such as the disclosed U.S. patent documents US07799642, US20090085074, US20110233666, US20110233667, etc., try to omit the manufacturing method of the mask step of the base region or the source region, the steps are relatively complicated and difficult to produce, and the semiconductor device has a poor termination structure, so that The breakdown voltage and reliability of the device are also relatively poor

Method used

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  • A method for preparing trench semiconductor power discrete devices
  • A method for preparing trench semiconductor power discrete devices
  • A method for preparing trench semiconductor power discrete devices

Examples

Experimental program
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Embodiment 1

[0053] Such as figure 1As shown, the epitaxial layer is grown above the substrate. First, an oxide layer (hard oxide mask with a thickness of 0.3um to 1.5um) is formed on the epitaxial layer by deposition or thermal growth, and then a layer of oxide is deposited on the oxide layer. A photolithographic coating is then patterned through a trench mask to expose portions of the oxide layer.

[0054] like figure 2 As shown, the exposed part of the oxide layer is dry-etched until the epitaxial layer is exposed, openings are formed, and then the photoresist coating is removed.

[0055] like image 3 As shown, implant P-type dopants on the surface of the silicon wafer (the dose is 8e12 / cm 3 to 2e14 / cm 3 ), the part covered by the thick oxide layer is not implanted, the part not covered by the thick oxide layer, the P-type dopant will be implanted on the surface of the epitaxial layer, and the P-type dopant can be B11 (boron boron).

[0056] like Figure 4 As shown, the implante...

Embodiment 2

[0072] The technical scheme of the present embodiment is roughly the same as that of embodiment 1, and its difference only lies in:

[0073] In the above example 1 Figure 5 Before etching the trench, first deposit a layer of oxide layer and seal the opening width of the trench mask in the oxide layer ranging from 0.2um to 0.6um. The width of the sealed opening can be 0.2um or 0.3um or 0.4um or 0.5um or 0.6um varies, depending on the preparation method. The advantage of this step is that some trench mask openings are implanted with P-type dopants but not N-type dopants. , and no trenches have been opened, the terminal structure of the device is better, so the breakdown voltage of the device is higher and more stable, and then the oxide layer is dry-etched to remove the oxide layer on the opening, exposing the Epitaxial layer; after etching the trench, only those openings that are not sealed by the precipitated oxide layer are opened. The trench (depth is 1.0um to 7.0um, width...

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Abstract

The invention discloses a method of preparing a trench semiconductor power discrete device. The method comprises the following steps of firstly injecting P-type doping agents into an epitaxial layer on a substrate through a trench mask to form P-type base regions, and then eroding the epitaxial layer to form a plurality of grid trenches; injecting N-type doping agents into side walls of the tops of the trenches to form N-type source regions; then, settlinginterlayer dielectric on the surface of the epitaxial layer, eroding the interlayer dielectric and the surface of the epitaxial layer to form contact trenches by means of a contact hole mask, and filling the contact trenches with metal plugs; and finally, settling a metal layer on the upper surface of the device, and conducting metal erosion through a metal mask to form a metal cushion layer and a connection line. By means of the preparing method, preparing processes of a base-region mask and a source-region mask are omitted, and therefore manufacturing cost of the device is greatly lowered; and meanwhile, original electrical characteristics of the device is not influenced, and therefore the price performance ratio of the device is increased.

Description

technical field [0001] The invention relates to the technical field of semiconductor power discrete devices, in particular to a method for preparing trench semiconductor power discrete devices. Background technique [0002] At present, the power MOSFET (MetalOxideSemiconductorFieldEffectTransistor, Metal Oxide Semiconductor Field Effect Transistor) has been widely used in various electronic and communication products, and at the same time, it also has various applications in industry. [0003] Power semiconductor devices represented by power MOSFETs can effectively control high-frequency large currents due to their low on-resistance and high-speed switching. At the same time, power MOSFETs are being widely used as small power conversion components such as power amplifiers, power converters, low noise amplifiers, and some personal computer power supply switches and power circuits, which are characterized by low power consumption and high speed. [0004] Trench power MOSFETs ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336
Inventor 苏冠创
Owner 立新半导体有限公司
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