Preparation method of trench semiconductor power discrete device
A technology of discrete devices and semiconductors, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as complex steps, poor terminal structure of semiconductor devices, poor breakdown voltage and reliability of devices, and achieve manufacturing costs The effect of reducing and increasing the performance-price ratio
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Embodiment 1
[0059] Such as figure 1 As shown, the epitaxial layer is placed above the substrate. First, an oxide layer (with a thickness of 0.3um to 1.5um oxide hard mask) is formed on the epitaxial layer by deposition or thermal growth, and another layer is deposited on the oxide layer. The photolithographic coating is then patterned through a trench mask to expose some portions of the oxide layer.
[0060] Such as figure 2 As shown, after dry etching the oxide layer exposed by patterning the trench mask, the epitaxial layer is exposed, and then the photolithographic coating is removed.
[0061] Such as image 3 As shown, implant P-type dopants on the surface of the silicon wafer (the dose is 8e12 / cm 3 to 2e14 / cm 3 ), the part covered by the original oxide layer is not implanted, and the part not covered by the original oxide layer, the P-type dopant will be implanted on the surface of the epitaxial layer to form a P-type region, and the P-type dopant can be B11 (boron boron) .
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Embodiment 2
[0075] The technical scheme of the present embodiment is roughly the same as that of embodiment 1, and its difference only lies in:
[0076] In the above example 1 Figure 5 Before etching the trench, first deposit a layer of oxide layer and seal the opening width of the trench mask in the oxide layer ranging from 0.2um to 0.6um. The width of the sealed opening can be 0.2um or 0.3um or 0.4um or 0.5um or 0.6um varies, depending on the preparation method. The advantage of this step is that some trench mask openings are implanted with P-type dopants but not trenched. The terminal structure of the device is better, so the breakdown voltage of the device is higher and more stable. Then dry etch the oxide layer to remove the oxide layer on the opening and expose the epitaxial layer on the opening; then etch the trench, At this time, only those openings that are not sealed by the precipitated oxide layer are trenched, and the trench (1.0um to 7.0um in depth and 0.2um to 2.0um in wid...
Embodiment 3
[0078] The technical scheme of the present embodiment is roughly the same as that of embodiment 1, and its difference only lies in:
[0079] In the above example 1 Figure 13 Before etching the contact hole trench, first deposit a layer of (LPCVD) oxide layer, and then dry-etch the oxide layer to remove the oxide layer in the opening of the contact hole trench, exposing the epitaxial layer in the opening; etched contact hole trenches. Other steps are basically identical with embodiment 1 or embodiment 2, and the cross section of device is as follows Figure 17 shown.
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