A method of manufacturing a trench type lateral mosfet device
A manufacturing method and device technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as limiting the application of power MOSFETs, and achieve the effects of reducing process costs, improving withstand voltage, and alleviating conflicting relationships
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Embodiment 1
[0051] As a preferred embodiment of the present invention, the present invention discloses a novel method for manufacturing an N-channel lateral trench power MOSFET with deep trenches and auxiliary semiconductor layers of two different conductivity types outside the trenches, including Follow the steps below:
[0052] Step 1: Material preparation. Prepare SOI materials (such as Figure 1a shown) or bulk silicon materials (such as Figure 1b shown), the SOI material includes a substrate layer 1, a dielectric buried layer 2 and an active layer 3, wherein the dielectric buried layer 2 is located between the substrate layer 1 and the active layer 3, and the conductivity type of the substrate layer 1 is not limited, there are The conductivity type of the source layer 3 is the first conductivity type; the bulk silicon material includes a substrate layer 1 and an active layer 2, wherein the conductivity type of the substrate layer 1 is the second conductivity type, and the conductiv...
Embodiment 2
[0068] This example proposes a manufacturing method of a new type of N-channel lateral trench power MOSFET with deep trenches and auxiliary semiconductor layers of two different conductivity types outside the trenches, which can work normally without external circuits. Compared with Example 1, this example specifically needs to increase the following process steps:
[0069] (1) Step A is added between Step 11 and Step 12 in Embodiment 1: grow an oxide layer on the surface of the active layer 3, apply photoresist, and photolithographically expose the auxiliary semiconductor layer 5b of the first conductivity type, Then etch the auxiliary semiconductor layer 5b of the first conductivity type to a set depth to form a second trench (such as Figure 15 shown);
[0070] (2) Add step B between step 12 and step 13 described in embodiment 1: fill the second trench obtained in step A with a P-type semiconductor, and planarize the surface and remove the oxide layer, so that the surface ...
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