SiC metal oxide semiconductor (MOS) capacitor of Al2O3/LaScO3/SiO2 stacked gate dielectric layer and production method of SiC MOS capacitor
A gate dielectric layer and stacking technology, which is applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve the problem that the thickness of SiO2 cannot be grown too thick, the interface state density between the dielectric and the SiC substrate is large, and the traps in the oxide layer Density and leakage current are large, to achieve the effect of increasing critical breakdown electric field, increasing channel mobility, reducing interface state density and boundary trap density
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[0034] The technical solutions of the present invention will be described in further detail below with reference to the accompanying drawings and embodiments.
[0035] figure 1 For the present invention Al 2 o 3 / LaScO 3 / SiO 2 A schematic diagram of a SiC MOS capacitor with stacked gate dielectric layers, as shown in the figure, the present invention includes: SiC substrate 1 , SiC epitaxial layer 10 , stacked gate dielectric layer 2 and positive and negative electrodes 3 .
[0036] SiC epitaxial layer 10 is provided on SiC substrate 1;
[0037] The stacked gate dielectric layer 2 includes the lower SiO 2 Transition layer 21, LaScO 3 Layer 22 and Al 2 o 3 Covering layer 23; SiC epitaxial layer 10 is provided with lower layer SiO 2 Transition layer 21, lower layer SiO 2 The transition layer 21 is provided with LaScO 3 Layer 22, LaScO 3 Layer 22 is provided with Al 2 o 3 Overlay 23;
[0038] Positive electrode 31, negative electrode 32 and Al respectively 2 o 3...
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