Field effect transistor with three-sag structure and preparation method thereof

A field-effect transistor, recessed structure technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem that the saturation leakage current is not substantially improved, the effective carrier mobility is reduced, and the drain current is reduced. and other problems, to achieve the effects of increased breakdown voltage, increased saturation leakage current, and reduced gate-to-drain capacitance

Active Publication Date: 2015-09-16
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Although the breakdown voltage of the double-recess structure 4H-SiC MESFET is increased due to the fact that half the length of the source side of the gate is recessed into the N-type channel layer, the saturation leakage current has not been substantially improved.
And in practice, the process of reactive i

Method used

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  • Field effect transistor with three-sag structure and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0035] Example one

[0036] The length of the low gate, the middle gate and the high gate of the gate electrode 10 are respectively 0.2 μm, 0.2 μm, 0.3 μm, and a three-recess structure field effect transistor with a step height of 0.05 μm.

[0037] Follow the steps below:

[0038] Step 1) Cleaning the 4H-SiC semi-insulating substrate 1 to remove dirt on the surface of the substrate;

[0039] a. Carefully clean the substrate two or three times with a cotton ball dipped in methanol to remove SiC particles of various sizes on the surface;

[0040] b. Place the 4H-SiC semi-insulating substrate 1 in H 2 SO 4 :HNO 3 =1:1 under ultrasound for 5 minutes;

[0041] c. Put 4H-SiC semi-insulating substrate 1 in 1# cleaning solution (NaOH:H 2 O 2 :H 2 O=1:2:5), boil for 5 minutes, then rinse with deionized water for 5 minutes, then put in 2# cleaning solution (HCl:H 2 O 2 :H 2 O=1:2:7), boil for 5 minutes, finally rinse with deionized water and use N 2 Blow dry and set aside.

[0042] Step 2) A 0.5μm ...

Example Embodiment

[0074] Example two

[0075] A 4H-SiC metal semiconductor field effect transistor with a three-recess structure with low, medium, and high gate lengths of 0.2 μm, 0.3 μm, 0.2 μm, and a step height of 0.05 μm was fabricated. The difference between this embodiment and the first embodiment lies in step 7)

[0076] a. Using positive photoresist, coating speed: 3000R / min, glue thickness> 2μm, to ensure the etching masking effect of the glue during subsequent etching;

[0077] b. After the glue is applied, it is pre-baked for 90 seconds in an oven at 90℃, and then developed in a special developer for 60 seconds after UV exposure for about 35 seconds with a concave channel photoetching plate. The formula of the special developer: Tetramethylammonium hydroxide: Water=1:3, then post-bake in an oven at 100°C for 3 minutes;

[0078] c. Use ICP inductively coupled plasma etching system for N + Etching, the etching conditions are 375W etching power, 60W bias power, working pressure 9Pa, etching ga...

Example Embodiment

[0081] Example three

[0082] A 4H-SiC metal semiconductor field effect transistor with a three-recess structure with low, medium, and high gate lengths of 0.3 μm, 0.2 μm, 0.2 μm, and a step height of 0.05 μm was fabricated. The difference between this embodiment and the first embodiment lies in step 7)

[0083] a. Using positive photoresist, coating speed: 3000R / min, glue thickness> 2μm, to ensure the etching masking effect of the glue during subsequent etching;

[0084] b. After the glue is applied, it is pre-baked for 90 seconds in an oven at 90℃, and then developed in a special developer for 60 seconds after UV exposure for about 35 seconds with a concave channel photoetching plate. The formula of the special developer: Tetramethylammonium hydroxide: Water=1:3, then post-bake in an oven at 100°C for 3 minutes;

[0085] c. Use ICP inductively coupled plasma etching system for N + Etching, the etching conditions are 375W etching power, 60W bias power, working pressure 9Pa, etching ...

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Abstract

The invention belongs to the technical field of field effect transistors, and especially discloses a field effect transistor with a three-sag structure and a preparation method thereof. The invention aims to provide a field effect transistor with a three-sag structure which has wide-channel deep sags and has higher output current and breakdown voltage and better frequency characteristic, and a preparation method thereof. The technical scheme adopted is as follows: a 4h-SiC half-insulating substrate, a P-type buffer layer and an N-type channel layer are arranged from top to bottom; a source cap layer and a drain cap layer are respectively arranged at the two sides of the N-type channel layer; a source electrode and a drain electrode are respectively arranged on the surfaces of the source cap layer and the drain cap layer; a ladder-shaped gate electrode is arranged in the middle of the N-type channel layer and close to the side where the source cap layer is arranged; and a left channel and a right channel are respectively formed at the two sides of the gate electrode and the N-type channel layer.

Description

Technical field: [0001] The invention belongs to the technical field of field effect transistors, in particular to a field effect transistor with a three-recess structure and a preparation method thereof. Background technique: [0002] SiC materials have outstanding material and electrical properties such as wide band gap, high breakdown electric field, high saturated electron migration velocity, and high thermal conductivity, making them suitable for high-frequency and high-power device applications, especially high temperature, high voltage, aerospace, satellite, etc. It has great potential in high-frequency high-power device applications in harsh environments. In SiC allomorphs, the electron mobility of 4H-SiC with hexagonal close-packed wurtzite structure is nearly three times that of 6H-SiC, so 4H-SiC materials are used in high-frequency and high-power devices, especially in metal-semiconductor fields. Effect transistor (MESFET) occupies a major position in the applica...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/423H01L29/10H01L21/336H01L21/28
CPCH01L29/1033H01L29/42356H01L29/66068H01L29/78
Inventor 贾护军张航邢鼎杨银堂
Owner XIDIAN UNIV
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