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Field effect transistor with three-sag structure and preparation method thereof

A field-effect transistor, recessed structure technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem that the saturation leakage current is not substantially improved, the effective carrier mobility is reduced, and the drain current is reduced. and other problems, to achieve the effects of increased breakdown voltage, increased saturation leakage current, and reduced gate-to-drain capacitance

Active Publication Date: 2015-09-16
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Although the breakdown voltage of the double-recess structure 4H-SiC MESFET is increased due to the fact that half the length of the source side of the gate is recessed into the N-type channel layer, the saturation leakage current has not been substantially improved.
And in practice, the process of reactive ion etching (RIE) will form lattice damage on the surface of the drift region of the device, resulting in a decrease in the effective mobility of carriers in the N-type channel layer, thereby reducing the drain current. In terms of current output characteristics manifested as a degradation of the saturation current

Method used

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  • Field effect transistor with three-sag structure and preparation method thereof

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] A field effect transistor with a three-recess structure with the lengths of the lower gate, the middle gate and the upper gate of the gate electrode 10 being 0.2 μm, 0.2 μm, and 0.3 μm respectively, and the step height being 0.05 μm was prepared.

[0037] Follow the steps below:

[0038] Step 1) cleaning the 4H-SiC semi-insulating substrate 1 to remove dirt on the surface of the substrate;

[0039] a. Carefully clean the substrate two or three times with a cotton ball dipped in methanol to remove SiC particles of various sizes on the surface;

[0040] b. Place 4H-SiC semi-insulating substrate 1 in H 2 SO 4 :HNO 3 = Ultrasound for 5 minutes in 1:1;

[0041] c. Put the 4H-SiC semi-insulating substrate 1 in 1# cleaning solution (NaOH:H 2 o 2 :H 2 O=1:2:5) and boiled for 5 minutes, then rinsed with deionized water for 5 minutes and then put into 2# cleaning solution (HCl:H 2 o 2 :H 2O=1:2:7) and boiled for 5 minutes, finally rinsed with deionized water and rinsed ...

Embodiment 2

[0075] A 4H-SiC metal-semiconductor field effect transistor with a three-recess structure with the low, middle, and high gate lengths of the gate electrode 10 being 0.2 μm, 0.3 μm, and 0.2 μm and a step height of 0.05 μm was fabricated. The difference between this embodiment and Embodiment 1 lies in step 7)

[0076] a. Use positive photoresist, coating speed: 3000R / min, glue thickness > 2μm to ensure the etching masking effect of the glue during subsequent etching;

[0077] b. After gluing, pre-bake in a 90°C oven for 90 seconds, use a concave groove photolithography plate for about 35 seconds of ultraviolet exposure, and then develop in a special developer for 60 seconds. The formula of the special developer: tetramethylammonium hydroxide: Water = 1:3, then post-bake in an oven at 100°C for 3 minutes;

[0078] c. Using ICP inductively coupled plasma etching system for N + Etching, the etching conditions are etching power 375W, bias power 60W, working pressure 9Pa, and the e...

Embodiment 3

[0082] Fabricate a 4H-SiC metal-semiconductor field-effect transistor with a three-recess structure with the low, middle, and high gate lengths of the gate electrode 10 being 0.3 μm, 0.2 μm, and 0.2 μm, respectively, and a step height of 0.05 μm. The difference between this embodiment and Embodiment 1 lies in step 7)

[0083] a. Use positive photoresist, coating speed: 3000R / min, glue thickness > 2μm to ensure the etching masking effect of the glue during subsequent etching;

[0084] b. After gluing, pre-bake in a 90°C oven for 90 seconds, use a concave groove photolithography plate for about 35 seconds of ultraviolet exposure, and then develop in a special developer for 60 seconds. The formula of the special developer: tetramethylammonium hydroxide: Water = 1:3, then post-bake in an oven at 100°C for 3 minutes;

[0085] c. Using ICP inductively coupled plasma etching system for N + Etching, the etching conditions are etching power 375W, bias power 60W, working pressure 9Pa,...

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Abstract

The invention belongs to the technical field of field effect transistors, and especially discloses a field effect transistor with a three-sag structure and a preparation method thereof. The invention aims to provide a field effect transistor with a three-sag structure which has wide-channel deep sags and has higher output current and breakdown voltage and better frequency characteristic, and a preparation method thereof. The technical scheme adopted is as follows: a 4h-SiC half-insulating substrate, a P-type buffer layer and an N-type channel layer are arranged from top to bottom; a source cap layer and a drain cap layer are respectively arranged at the two sides of the N-type channel layer; a source electrode and a drain electrode are respectively arranged on the surfaces of the source cap layer and the drain cap layer; a ladder-shaped gate electrode is arranged in the middle of the N-type channel layer and close to the side where the source cap layer is arranged; and a left channel and a right channel are respectively formed at the two sides of the gate electrode and the N-type channel layer.

Description

Technical field: [0001] The invention belongs to the technical field of field effect transistors, in particular to a field effect transistor with a three-recess structure and a preparation method thereof. Background technique: [0002] SiC materials have outstanding material and electrical properties such as wide band gap, high breakdown electric field, high saturated electron migration velocity, and high thermal conductivity, making them suitable for high-frequency and high-power device applications, especially high temperature, high voltage, aerospace, satellite, etc. It has great potential in high-frequency high-power device applications in harsh environments. In SiC allomorphs, the electron mobility of 4H-SiC with hexagonal close-packed wurtzite structure is nearly three times that of 6H-SiC, so 4H-SiC materials are used in high-frequency and high-power devices, especially in metal-semiconductor fields. Effect transistor (MESFET) occupies a major position in the applica...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/423H01L29/10H01L21/336H01L21/28
CPCH01L29/1033H01L29/42356H01L29/66068H01L29/78
Inventor 贾护军张航邢鼎杨银堂
Owner XIDIAN UNIV
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